The earliest hard disk video recorder is PC card, and the video acquisition card mainly includes video signal acquisition, digital video compression processing and video cache, among which there are many kinds of digital video compression processing chips (general DSP or special ASIC). With the continuous upgrading of CPU, memory and other core chips, the main frequency and comprehensive processing ability of computers are constantly improved, so a multi-card multi-channel hard disk recorder has appeared on the basis of a single-card hard disk recorder, that is, multiple single-channel audio and video acquisition cards supporting parallel processing are inserted into multiple expansion slots of a PC at the same time to realize simultaneous real-time acquisition of multi-channel audio and video signals. Since each card only corresponds to 1 signal, the number of acquisition cards can be flexibly configured according to the number of video signals. However, when multiple cards are inserted into a PC, the occupied PC resources increase accordingly, such as CPU and memory resources, the number of expansion slots on the motherboard, and the power supply of the motherboard. Therefore, when the number of camera sources (that is, the number of acquisition cards) is large, this kind of hard disk video recorder must adopt an industrial computer with a multi-slot industrial control backplane, and be equipped with a high-power power supply, and the CPU frequency is also high.
In order to solve the resource occupation problem of multi-card applications, shortly after the advent of single-card single-channel hard disk video recorder, some manufacturers introduced a multi-channel video and audio acquisition card that integrated two or even four video processing chips (DSP or ASIC) on one card, so that two or four signals can be collected at the same time and compressed in real time. In fact, this structure is that each video signal only corresponds to a video processing chip, but they share a PCI-PCI bridge chip, which only occupies a PC slot. The acquisition and compression of video and audio signals are realized by the hardware on the card, which effectively reduces the occupation of PC resources by hard disk video recording. There is also a PC-based single-card multi-channel hard disk video recorder: a video processing chip on the card will process multi-channel input signals, so it is necessary to collect multi-channel video signals in time-sharing rotation and record them in M-JPEG compression format. Although the compression efficiency of M-JPEG is not as high as that of MPEG- 1, MPEG-4 and H.264 based on multi-frame predictive coding, it is meaningless to adopt the video compression algorithm based on inter-frame predictive coding because the pictures of consecutive frames lose their correlation (not the pictures taken by the same camera at all), so intra-frame compression algorithm can only be adopted. So in this way, the hard disk video recorder carries out JPEG compression processing independently for each frame of images collected, and then forms an independent M-JPEG file for each frame of images corresponding to each input. This method can obviously realize multi-channel acquisition conveniently, for example, it can accommodate as many as 16 video inputs without considering the continuity requirements of video images. But for a video processing chip that can only collect video signals at the rate of 25 frames per second, no matter how many video signals are switched to its input in turn, its "total resources" of 25 frames per second cannot be changed. Therefore, for this type of hard disk video recorder,
The improved product of the above structure increases the number of video acquisition channels (for example, four acquisition channels are integrated on one card), so that each acquisition channel can collect multi-channel video input signals in parallel, which is equivalent to increasing the number of "total resources" for display and video recording (multi-channel rotation plus multi-channel acquisition). For example, a manufacturer uses two 8-channel acquisition cards to realize 16 channel signal acquisition, which makes the "total resources" of DVR reach 160 frames per second.
It should be noted that the M-JPEG compression algorithm lacks inter-frame compression, which will lead to a small total video compression ratio and increase the image storage (and of course increase the hard disk overhead). For example, when the definition is equivalent to that of MPEG- 1 image, the number of bytes in each frame of M-JPEG image is about 6K~20KB, which is about 3~ 10 times that of MPEG- 1 image. In addition, it is difficult for DVR products using M-JPEG algorithm to record multi-channel sound signals simultaneously, because the JPEG standard itself does not describe the method of sound compression. Especially when video frames are lost due to multipath rotation, how to synchronize sound is a problem that needs to be considered. In addition, because M-JPEG does not form a unified standard, it only describes the compression method in principle or grammar. The actual M-JPEG standards are stipulated and written by DVR manufacturers themselves, and the M-JPEG standards of various manufacturers are not universal. That is to say, the video files recorded by a certain brand DVR can't be called in other DVR systems based on M-JPEG compression, nor can they be called by general media playing software such as Microsoft Media Player, which limits the networking application of several DVR systems with different brands. Quasi-embedded hard disk video recorder based on PC structure
The hard disk video recorder based on PC card mentioned above is not separated from PC system: PC appearance, PC architecture, PC operating system, PC interface, etc. So it can be regarded as an extended application of PC. As long as you quit the application program of hard disk video recorder (or put the application program in the background), this hard disk video recorder is a standard PC, and users can easily edit documents, report statistics and other operations in the MS Office environment. But because of this, the hard disk video recorder with this structure is vulnerable to virus attacks, resulting in system paralysis; It may also lead to system downtime due to hardware compatibility problems or some bugs in system software; What's more, due to the system administrator's own problems (such as operators putting video programs in the background and playing games in the foreground) and some wrong settings and operations, the video recording system may even be unusable.
In order to get rid of PC system, some merchants have introduced quasi-embedded hard disk video recorders. But in essence, this DVR is not really separated from the PC system, because it still adopts the hardware structure of PC: in addition to peripheral devices such as CPU, the motherboard also integrates graphics card, sound card, network card and PCI expansion slot with video capture card, and the power supply part is also a high-power switching power supply with fan. But in order to make it appear in the monitoring market in the form of professional equipment, the machine adopts an integrated design. Compared with the PC-based DVR mentioned above, this kind of quasi-embedded DVR makes full use of the hardware resources of PC, effectively considers the overall spatial layout of the machine, has a more compact structure and effectively reduces the volume, and is specially used to realize hard disk video recording in the monitoring system.
CIVON is one of the early quasi-embedded DVRs. This product is based on a micro PC motherboard with two horizontal PCI slots. At least one single-channel video capture card can be inserted, at most two four-channel video capture cards can be inserted, a PC standard hard disk can be hung, and hard disk video recorders with different channels can be flexibly constructed.
Like ordinary PC, this machine also uses Pentium series CPU, except that an electronic disk embedded with Linux operating system and application programs is connected to the main boot IDE interface of PC motherboard. At startup, the machine is automatically booted by the Linux system of the electronic disk, and then the hard disk video application program is automatically started. With an external monitor, keyboard and mouse, users can make basic settings just like operating a PC (except that the operating system of the machine is Linux instead of DOS or Windows). After setting up, you can remove the monitor, keyboard, mouse and other peripherals. At this time, if the networked client has installed the supporting hard disk video management software, the client can access DVR through the network, watch real-time images or adjust video files, and make other settings and adjustments to the hard disk video recorder. DSP embedded is an embedded hard disk video recorder based on DSP.
Embedded hard disk video recorder is completely separated from PC structure and adopts the overall structure with DSP as the core. Functional modules such as video acquisition, video compression processing and network interface are integrated on a circuit board. As far as the core chip DSP is concerned, there are mainly TMS320C6xxx series of TI company, Trimedia series of Philip company, MAP-CA(BSP) series of Equator company and ADSP-BF5xx series of AD company in the market.
DSP itself does not collect video signals. Therefore, for the hard disk video recorder based on DSP, it is generally necessary to cooperate with the video acquisition chip, such as the video processing chip SAA 711A of Philips. The analog video signal (S-Video or CVBS) input to DVR is processed by SAA 7 1 1A, and the standard ITU-R BT.656 digital video stream is obtained, and then sent to DSP for processing.
The processing ability of DSP generally depends on its clock frequency and the parallelism of processing units. Up to now, most popular DSPs have multiple processing units that can be executed in parallel, and each execution unit is composed of arithmetic logic operation unit (ALU), multiplexer and accumulator.
TMS320C6xxx series of TI company
TI's TMS320C6xxx series is a high-performance DSP chip, which can be divided into fixed-point and floating-point categories. It integrates all the advantages of the popular DSP, and has high cost performance and low power consumption. The video processing ability of DVR with different chips in this series is different. The compression standards are mainly MPEG-4 and H.264, and the image resolutions are CIF, 2CIF(DCIF) and D 1 from low to high. Among them, DVR, which can handle D 1 image quality, generally supports four channels of real-time recording of CIF image quality.
TriMedia series of Philips
TriMedia is a DSP chip specially designed by Philips for multimedia video and audio applications. Among them, PNX 1302 is a media processor with high-quality digital video and audio application processing capability in TriMedia series. PNX 1500 is a more powerful 32-bit DSPCPU for multimedia applications such as audio and video, graphics and communication, which was introduced by Philips after PNX 1302. PNX 1500 has a C/C++ programmable TM3260 CPU, which conforms to the parallel VLIW structure. Its on-chip independent DMA interface can speed up data processing, and many co-processing units such as image scaling, deinterleaving and 2D drawing greatly improve the multimedia processing ability of the chip.
Equatorial company's MAP-CA series
MAP-CA is a series of high-speed broadband DSP chips introduced by Equatorial Company, also known as broadband signal processor (BSP). It can work at a high-speed clock of 300MHz, with a processing capacity of 30 GOPS (gigabit operations per second, that is, 30 billion integer operations per second). It is about 6.4 times the processing speed of Pentium III, and it is mainly used in broadband video applications with high performance and large data volume, such as embedded hard disk video recorder (DVR), embedded network video server (DVS), digital set-top box, digital TV, video conference system, medical imaging products and so on. Here, MAP-CA is one of VLIW (Very Long Instruction Word) processors in the MAP series of Equatorial Company, and its latest MAP-BSP- 15 further improves the working frequency to 400MHz, making the data processing capacity reach 40GOPS (for video coding). MAP-CA mainly includes a very long instruction word processor core, a programmable bit stream coprocessor (VLx), a video filtering coprocessor, a display refresh controller and rich digital I/O interfaces. MAP-CA supports the compression and decompression of various videos, images and signals realized by software. The algorithm realized by this software has great advantages over hardware implementation, and it is very convenient to upgrade.
ADSP-BF5xx series from analog devices.
ADI's ADSP-BF5xx processor is developed on the basis of its Blackfin series processors. Among them, several functional modules of Blackfin series processor cores can support 8/ 16/32-bit integer data and 16/32-bit decimal data, especially four 8-bit video arithmetic logic units (ALU) can address various multimedia algorithms including MPEG-2, MPEG-4 and JPEG, so that one processor can process four kinds of information at the same time. The upgraded Blackfin products ADSP-BF533, ADSP-BF532 and ADSP-BF53 1 not only inherit the advantages of Blackfin products' ease of use and code compatibility, but also significantly improve performance and reduce power consumption. The pins of these three new processors are completely compatible, and the only difference lies in the performance and the capacity of on-chip memory, which makes the system performance easy to upgrade and reduces many risks in new product development.
ADSP-BF533 has a clock frequency of 600MHz and a running speed of 1.2GMACS, which is very suitable for embedded video and broadband access gateway applications. ASIC card is a network hard disk video recorder based on ASIC card.
ASIC is an application-specific integrated circuit, which is specially customized for application purposes. Therefore, the hard disk video recorder based on video ASIC has a more compact structure and better performance. However, because the structure of ASIC often needs to refer to the successful transplantation of new algorithms on DSP, DVR based on ASIC is generally later than DVR based on DSP in the appearance time of hard disk video recorder with the same compression format (such as H.264).
SM22 10 is a real-time MPEG-2 video codec chip introduced by SDRAM Media. It is compatible with MP@ML, SP@ML and MP@LL standards of ISO/IEC- 138 18, and has good interface characteristics. Therefore, SM22 10 ensures high-quality image processing. In the coding mode, SM22 10 accepts the digital video signal input according to ITU-R 60 1 or ITU-R 656 format, first converts it into 4:2:2 to 4:2:0 format, then carries out programmable pre-filtering on the digital video signal, and then carries out real-time digital coding to form a compressed bit stream in MPEG-2 MP@ML format. Users can also define their own quantization matrix and select the effective area of the image. In the decoding mode, SM22 10 receives and decodes the bit streams in MPEG- 1 and MPEG-2 formats, and then filters them to output digital video signals in accordance with ITU-R 60 1 or ITU-R 656 formats. SM22 10 not only supports many video formats, such as NTSC, PAL and FILM, but also can encode and decode the codestreams in VCD and SVCD formats.
Many ASIC are often used in conjunction with FPGA (Field Programmable Gate Array), and some specific algorithms are specially implemented by FPGA, such as discrete cosine transform (DCT) operation, which is the core part of MPEG-2 and MPEG-4 algorithms. Although the DCT part of MPEG algorithm has been standardized and can be effectively implemented in ASIC or FPGA, there are still many parts in MPEG coding that are not clearly defined, and it is these unclear parts that make a company's products different from competitors and develop an algorithm with independent property rights. Therefore, some ASIC-based DVR uses FPGA in these parts (such as motion estimation module), because FPGA can be reconfigured, so it is easy to refresh the device and integrate new algorithms in the whole development stage (including after configuration). However, companies that completely rely on standard ASIC solutions cannot develop similar products with better performance due to the limitations of the chip itself, and the market risk is greater.