Motherboard IMC is the integrated memory controller of CPU. Each CPU die of the processor supports two IMCs, and each IMC can control two or three DDR4 channels according to the processor type.

IMC interface interacts with other non-cores through its dedicated Mesh2Mem(M2M) logic (Mesh interface).

The functions of the home agent (HA) are distributed in the home agents of M2M and CHA. The read-write address from CHA is decoded into IMC according to the address. This channel decomposes reading and writing into a series of precharge and activate commands, and schedules their requests for DDR command/address lines.