In resistive load modulation, the load is connected in parallel with a resistor, which is called load modulation resistor. The resistor is turned on and off according to the clock of data flow, and the switch S is controlled by binary data coding. The circuit schematic diagram of resistance load modulation is shown in Figure 7. 15.
Figure 7. 15? Schematic diagram of resistance load modulation circuit
The characteristics of resistive load modulation are as follows.
(1) When the binary data code is "1", the switch S is turned on, and the load resistance of the electronic tag is connected in parallel with the sum; When the binary data code is "0", the switch S is turned off, and the load resistance of the electronic tag is. This shows that when the switch S is turned on, the load resistance of the electronic tag is relatively small.
(2) For parallel resonance, if the parallel resistance is small, the quality factor will decrease. That is to say, when the load resistance of the electronic tag is relatively small, the quality factor value will decrease, which will reduce the voltage across the resonant circuit.
(3) The above analysis shows that when the switch S is turned on or off, the voltage across the resonant circuit of the electronic tag will change. In order to recover (demodulate) the data sent by the electronic tag, the above changes should be transmitted to the reader.
(4) When the voltage across the resonant circuit of the electronic tag changes, due to the inductive coupling of the coil, this change will be transmitted to the reader, which shows that the amplitude of the voltage across the coil of the reader changes, thus generating the amplitude modulation of the reader voltage.
(5) The waveform change process of resistance load modulation is shown in Figure 7. 16. Fig. 7. 16(a) is the binary data encoding of the electronic tag data, fig. 7. 16(b) is the voltage across the coil of the electronic tag, fig. 7. 16(c) is the voltage across the coil of the reader, and fig. 7. 16(d) It can be seen that the binary data coding in Figure 7. 16(a) is consistent with that in Figure 7. 16(d), indicating that resistive load modulation completes the information transmission.
Figure 7. 16? Waveform change process of resistance load modulation
2. Capacitive load modulation
In resistive load modulation, the load is connected in parallel with a capacitor, which replaces the load modulation resistor controlled by binary data coding. The circuit schematic diagram of capacitive load modulation is shown in Figure 7. 17.
Figure 7. 17? Schematic diagram of capacitive load modulation circuit
Capacitive load modulation has the following characteristics.
(1) In resistive load modulation, both the reader and the electronic tag are in a resonant state at the working frequency; However, in capacitive load modulation, the loop of the electronic tag is detuned due to the connection of the capacitor, and the reader is detuned due to the coupling between the reader and the electronic tag.
(2) The on-off control capacitor of the switch S is turned on and off according to the clock of the data stream, so that the resonant frequency of the electronic tag can be switched between two frequencies.
(3) Through qualitative analysis, it can be seen that the voltage on the inductance coil of the electronic tag drops when the capacitor is connected.
(4) As the voltage on the inductance coil of the electronic tag drops, the voltage on the inductance coil of the reader rises.
(5) The waveform change of capacitive load modulation is similar to that of resistive load modulation, but at this time, the voltage on the reader inductor not only changes in amplitude, but also changes in phase, so the phase change should be minimized.