Pin arrangement diagram of AT89S52 and its function
AT89S52 single chip microcomputer is a 40-pin chip, as shown in Figure 5- 1, and it is packaged in PDIP, PLCC and TQFP3-clock.
The function of each pin is as follows:
●P0 port -8-bit open-drain bidirectional I/O port.
When used as a general I/O port, each pin can drive 8 TTL loads; When used as input, each port is first set to 1.
When accessing off-chip data memory and program memory, P0 port can also be used as a multiplexing port of the low 8-bit address/data bus. In this case, the P0 port contains a pull-up resistor.
In Flash programming, P0 port inputs code data; During Flash verification, P0 port outputs code data. During programming verification, a pull-up resistor of10kΩ should be connected externally.
●P 1 port-8-bit bidirectional I/O port with pull-up resistor.
P 1 is the user's general I/O port, and each pin can drive four TTL loads. When used as input, each port is first set to 1.
The pins P 1.0 and P 1. 1 are also used as external counting input (P 1.0/T2) and trigger input (P 1. 1/T2DX) of Timer2.
During programming and verification, the P 1 port can enter a low byte address.
P2 port -8-bit bidirectional I/O port with built-in pull-up resistor.
P2 port can be used as general I/O and can drive four TTL loads. Write 1 into each bit of P2 port, which can be used as input. When the external load pulls each pin low, the current is output through the internal pull-up resistor.
When accessing the external program memory and data memory with 16 bit address, P2 port provides the upper 8-bit address. When accessing external data memory with MOVX @DPTR instruction, P2 port is the high 8-bit address (PCH); When using MOVX @R0 and MOVX @R 1 commands to access external data storage, the content on P2 port is SFR P2.
During programming and verification, the P2 port receives the high bit of the address line and some control signals.
P3 port -8-bit bidirectional I/O port with built-in pull-up resistor.
● P3 port can be used as a general I/O port and can drive four TTL loads. When used as input, it is necessary to pull the P3 port at each position, for example, the P3 port is pulled down by an external load, and then the current is output through a pull-up resistor.
During programming and verification, P3 port receives some control signals.
●—— Data latch allows/programs pulse input.
●—— The external program memory is read strobe, and the low level is effective.
●—— Access right of off-chip program memory.
Xtal 1 and XTAL2-Xtal 1 are the inputs of the on-chip oscillator inverting amplifier and the clock generator, and XTAL2 is the output of the on-chip oscillator inverting amplifier.
1. Evaluation conditions for intermediate professional titles
Intermediate engineers can directly evaluate the intermediate leve