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On the Digital Clock of Single Chip Microcomputer
There is no timer, but there is a digital clock.

Can refer to it

Some of them may be useful.

abstract

This paper presents a digital design based on single chip microcomputer. In this design, the microcontroller is the core controller, and the timing function is realized by frequency counting. The real-time time is output to the display device-digital tube through the microcontroller, and the functions of starting, stopping, resetting and adjusting time are realized through the keyboard.

Keywords: single chip microcomputer, digital clock, AT89S52, LED

1 Introduction

Today, with the maturity of single-chip microcomputer technology, its flexible hardware circuit design and software design make single-chip microcomputer widely used, which plays a decisive role in almost small electronic products to large industrial control. The small system structure of single chip microcomputer is almost a microcosm of all programmable hardware, which can be described as "the sparrow is small and complete".

Now is a new era of knowledge explosion. New products and technologies emerge one after another, and electronic technology develops with each passing day. It is no exaggeration to say that the application of electronic technology is everywhere, and electronic technology is constantly changing our lives and changing our world. In this era of rapid development, time is becoming more and more precious to people. In the fast-paced life, once people encounter important things and forget the time, it will bring great losses, so we need a timing system to remind these busy people. However, with the development of science and technology and the progress of society, people's requirements for clocks and watches are getting higher and higher, and traditional clocks and watches can no longer meet people's needs. Multifunctional digital clocks have undergone qualitative changes in performance and style, such as electronic alarm clocks and digital alarm clocks. The application of single chip microcomputer in multifunctional digital clock is very common, and the digital clock based on single chip microcomputer brings great convenience to people.

At present, most of the high-precision timing tools use quartz crystal oscillators. Because electronic clocks, quartz watches and quartz clocks all adopt timely technology, they have high precision, good stability and convenient use, and do not need to be adjusted frequently. Digital electronic clock uses integrated circuit timing decoding instead of mechanical transmission, and LED display instead of hands to display time, which reduces timing error. This watch has the function of displaying time in hours, minutes and seconds, and can also display time and minutes. The main content of the digital clock timing function introduced in this paper is realized by single chip microcomputer, in which AT89S52 is a modern timing device that dynamically displays "hour", "minute" and "second" by digital tube. Compared with the traditional mechanical watch, it has the characteristics of accurate time and intuitive display. Its timing cycle is 24 hours, and the full scale is "23: 59: 59". In addition, it also has the characteristics of time correction, memory function after power failure and timing synchronization when power supply is restored.

2 Scheme demonstration

2. 1 Scheme I

The digital clock uses FPGA as the main controller. Because FPGA has powerful resources, it is convenient and flexible to use and easy to expand its functions, especially when combined with EDA, it can achieve high efficiency. Although the logic of this scheme is a little simpler, the price of an FPGA is very high, which is a bit wasteful for making an electronic clock, and FPGA is difficult to master, so this scheme has not been studied too much and has not been adopted in this design.

2.2 Scheme II

Digital clock is composed of several CMOS digital integrated circuits with different logic functions. * * 10 digital integrated circuit, and its schematic diagram is shown in figure 2. 1. It consists of three parts: the second signal generator (time base circuit), time division counter and decoding and driving display circuit. Its basic working process is that the time base circuit generates a pulse signal with precise period, and the second signal of 1HZ is transmitted to the counter behind it through the frequency divider. Finally, the counter and the drive display unit drive the digital tube to display the time bit by bit. However, the circuit designed by this method is complex, inflexible and expensive, so this scheme is not adopted.

Fig. 2. Schematic diagram of1Scheme II

2.3 Scheme III

AT89S52 is a CMOS 8-bit microcontroller with low power consumption and high performance. It is manufactured by Atmel's high-density nonvolatile memory technology, which is fully compatible with the instructions and pins of industrial 80C5 1 products. On-chip Flash allows the program memory to be programmable in the system and is also suitable for traditional programmers. AT89S52 integrates intelligent 8-bit CPU and in-system programmable Flash on a single chip, which provides a highly flexible and effective solution for many embedded control application systems. It has serial port, on-chip crystal oscillator and clock circuit. In addition, AT89S52 can be reduced to 0Hz static logic operation, which supports two software selection power saving modes. In idle mode, CPU stops working, allowing RAM, timer/counter, serial port and interrupt to continue working. In the power-off protection mode, the RAM content is saved, the oscillator is frozen, and all the work of the single chip microcomputer stops until the next interruption or hardware reset.

Based on AT89S52 single chip microcomputer, the control of the system is realized. The peripheral circuit is relatively simple and the cost is relatively low. The flexible control of the system can well meet the basic requirements and expansion requirements of this topic, so this scheme is chosen. The hardware block diagram is shown in Figure 2.2, and the schematic diagram is shown in Appendix Figure 6. 1.

Figure 2.2 Hardware block diagram of digital clock

2.4 Circuit composition and working principle

In this paper, the design principle of digital clock mainly adopts AT89S52 single chip microcomputer. The P0 port of the single chip microcomputer controls the bit display of the digital tube, the P2 port controls the segment display of the digital tube, and the P 1 port is connected with the time correction key. In the design, 220V alternating current is introduced, and after rectification and filtering, +5V voltage is generated, which is used to provide working voltage for single chip microcomputer and display circuit.

When the whole system works, the second signal generator is the time base signal of the whole system, which directly determines the accuracy of the timing system. The standard second signal is sent to the "second counter", which uses a hexadecimal counter and sends out a "minute pulse" signal every 60 seconds, which will be used as the clock pulse of the "minute counter". The "Minute Counter" also adopts hexadecimal counter, and sends out a "time pulse" signal every 60 minutes, which will be sent to the "Time Counter". The "hour counter" adopts a 24-bit decimal timer, which can realize the accumulation of 24 hours a day. The display circuit displays the output of "hour", "minute" and "second" counters through six seven-segment LED displays. The time calibration circuit directly adds a pulse signal arrival counter, minute counter or second counter to calibrate and adjust the displayed numbers of "hour", "minute" and "second". In this design, the 24-hour clock display, stopwatch design and display all depend on the timer in the single chip microcomputer. Timer T0 is used to generate an interrupt of 1. In the interrupt program, the number changes every second, and the characters are dynamically displayed in the main program. Its functional block diagram is shown in Figure 2.3.

Figure 2.3 Functional schematic diagram of non-stopwatch interrupt.

The main function of the circuit design of digital clock is to provide the interface circuit between single chip microcomputer and external LED display, 273 data latch and chip selection, and external memory 2764. In addition, it is necessary to design related LED driving circuits.

(1) circuit principle and device selection

The device names of the key components related to this example and their main functions in the digital clock circuit:

89S52: Single chip microcomputer, which controls the data display of LED.

Led 1-LED 6: It is used to display the data of single chip microcomputer, three of which display the ten digits of hours, minutes and seconds in seven segments, and the other three display the digits of hours, minutes and seconds in eight segments.

74LS273: Latch, the segment code and bit code in the LED display expansion circuit use two pieces of 74LS273, and the rising edge is latched.

74LS02: NAND gate, used in conjunction with the read-write signal of single chip microcomputer, selects external 74LS273 to determine the display content of LED fields and words.

7407: Driving gate circuit, which provides the driving current displayed by digital tube.

74LS04: NOT-gate, which negates the chip selection signal of single chip microcomputer and determines the chip selection of 74LS273 together with the read-write signal.

L 1-L4: LED, controlled by single chip microcomputer P 1.4-P 1.7, is used to display the time changes of stopwatch and clock.

Buzzer: The speaker gives out sound under the circumstances specified by the program, indicating the end of time.

74LS373: Address latch, which separates the address and data of P0 port and inputs the data and address ports of 2764 respectively.

2764:EPROM, which provides external program storage area for single chip microcomputer.

Switches K0, K 1 and K2 adjust seconds, minutes and hours respectively.

Key reset: In the reset circuit, it plays the role of program reset.

Key pulse: provide a single pulse, so as to realize the counting function of external pulses by single chip microcomputer, and add the corresponding bits of 1 by single pulse.

(2) Address assignment and connection

P2.7: The chip select signal which constitutes the word bit port together with the write signal, and the address bit corresponding to the word bit port is 8000H.

P2.6: The chip select signal that constitutes the field port together with the write signal, and the address bit corresponding to the field port is 4000H.

D0-D7: the data bus of single chip microcomputer, and the content displayed by LED is transmitted from single chip microcomputer to LED through D0-D7 data line.

P2.0-P2.5: P2 port of single chip microcomputer, connected to the high-end address line of 2764, determines the address of the storage unit in 2764.

P 1.4-P 1.7: The P 1 port of the single-chip microcomputer is connected with the reflective diode L 1-L4, which is controlled by the single-chip microcomputer P 1.4-P 1.7 to display the time changes of the stopwatch and clock.

(3) Function introduction

In the connection between LED display module and single chip microcomputer, the reading and writing of LED display module and the selection of word bit and field channel are completed through P2.6 and P2.7 ports of single chip microcomputer. Among them, the chip selection signals of P2.6 and P2.7 ports need to be logically operated with the read-write signals to ensure the correctness of word bit and field selection.

The external memory 2764 is connected with the single chip microcomputer through 74LS373, and the address is allocated through the related signal line of P2 port. The address range is 0000h- 1ffh.

Design and demonstration of each circuit

3. 1 power supply circuit design

In all kinds of electronic equipment, DC regulated power supply is an indispensable part, which not only provides a variety of voltage sources for the system, but also directly affects the technical indicators and anti-interference performance of the system. If we want to get the output voltage of +5V, we need to rectify the AC voltage of 220V with diode and filter it with capacitor. The 7805 outputs a stable 5V DC voltage to provide power for the whole circuit.

Figure 3. 1 Power Circuit Diagram

Four IN4004 form a bridge rectifier circuit, the capacitor (104uf) is used for filtering, and LM7805 stabilizes the rectified and filtered voltage at 5V output.

3.2 crystal oscillator

5 1 series single chip microcomputer has a clock circuit (the core of which is an inverting amplifier), but it does not form an oscillation signal of the clock, and it must be connected with a resonator to form an oscillation. How to use this built-in amplifier can make different choices according to different occasions. This corresponds to the different ways of clock generation of single chip microcomputer: if this amplifier is used, oscillation is an internal way; If external oscillation input is used, it is external mode.

Option 1, internal mode

If a crystal resonator is externally connected between XTAL 1 and XTAL2 pins of 5 1 single chip microcomputer, self-excited oscillation will occur, and an oscillation clock with the same frequency as the external crystal will be generated internally.

The most common internal mode oscillation diagram is shown in Figure 3.2.

Figure 3.2 Crystal Oscillating Circuit

The highest working frequency of different single-chip computers is different. For example, the highest working frequency of AT89C5 1 is 24MHZ, while the highest working frequency of at89c 5 1 can reach 33MHZ. Due to the improvement of manufacturing technology, the working frequency range of single chip microcomputer now extends to both ends, which can reach more than 40MHZ. The higher the oscillation frequency, the faster the single chip microcomputer runs, but at the same time, the higher the speed requirements for memory and printed circuit board. Too high a frequency sometimes leads to programming difficulties (such as delayed programming). Generally speaking, it is not recommended to use a crystal oscillator with high frequency. 5 1 series single-chip microcomputer application systems generally choose crystal oscillator with frequency of 6 ~ 12 MHz.

There is no strict requirement for the values of C 1 and C2 in this circuit, but the capacitance will affect the stability, frequency and rapidity of the oscillator. Generally speaking, when the crystal is externally connected, the values of C 1 and C2 are usually selected as 20 ~ 100 pf.

Crystal oscillator is the core of digital clock. The stability of oscillator and the accuracy of frequency determine the accuracy of digital clock timing. Usually, a timely crystal is used to form an oscillator circuit. Generally speaking, the higher the frequency of the oscillator, the higher the timing accuracy. In this design, the signal source provides 1HZ second pulse, which is obtained by crystal frequency division. AT89S52 MCU has an inverting amplifier, which is used to form an internal oscillator. XTAL 1 and XTAL2 are the input and output terminals of the amplifier respectively. Both crystal and ceramic resonator can be used to form self-excited oscillator. Driving the device from an external clock source, XTAL2 can be connected from Xtal21instead of being connected. Since the external clock signal is triggered by frequency division by two as the input of the external clock circuit, there is no other requirement for the duty cycle of the external clock signal, and the longest low-level duration and the least high-level duration must meet the requirements. The input terminal of the inverting amplifier is XTAL 1 and the output terminal is XTAL2. A timing crystal and two capacitors are connected at both ends to form a stable self-excited oscillator. The capacitance is usually about 30PF. The oscillation frequency range is 1.2 ~ 12 MHz.

The oscillation signal of the crystal oscillator is output from XTAL2 pin to the on-chip clock generator. The clock generator is a frequency divider of two. Two-phase clock signals P 1 and P2 are provided to CPU. There are two beats (phases) P 1 and P2 in each clock cycle, and the CPU takes the two-phase clock P 1 and P2 as the basic beats to direct the coordination of all parts of AT89S52 single chip microcomputer. In this design, the oscillation frequency of the crystal is 1 1.0592MHz.

In addition, when designing the circuit board, the crystal oscillator and capacitor should be as close as possible to the single chip microcomputer chip to reduce the distributed capacitance and further ensure the stability of the oscillator.

Option 2, External Mode

In large-scale application systems, multiple single-chip computers may be used. In order to ensure the synchronization of clock signals between single-chip computers, it is necessary to introduce a unique public external pulse signal as the oscillation pulse of each single-chip computer, that is, to adopt external mode and directly introduce the external oscillation signal into XTAL 1 and XTAL2 pins.

Because the internal clock input pins of HMOS and CHMOS are different, the access modes of external oscillation signals are also different. So don't choose this plan.

3.3 Timing circuit

When the digital clock goes wrong, it needs to correct the time. The timing control circuit realizes the calibration of "second", "minute" and "hour". The circuit diagram is shown in Figure 3.3:

Figure 3.3 Timing Circuit

3.4 decoding display circuit

The function of the decoding circuit is to translate the output states (842 1 code) of the "seconds", "minutes" and "hours" counters into the electrical signals required by seven (or eight) digital tubes to display decimal numbers, and then display the corresponding numbers through the digital tubes. The decoder adopts 74LS248 decoder/driver. The display adopts seven-segment * * * cathode digital tubes. The display part is the most important part of the whole electronic clock, and * * * needs a 6-bit LED display screen. Adopt dynamic display mode. The so-called dynamic display mode means that the time figures are displayed on the led one by one. It controls which LED displays numbers through the bit selection terminal. Because the time interval of these LED digital tubes is very short, people can see that they display time and numbers together, and the dynamic display mode uses fewer interfaces, saving CPU pins. Because of the port problem and the superiority of dynamic display mode, this design adopts * * * negative connection mode. The display LED has two ports: segment selection and position selection. First, the segment selection consists of eight LED ports. By inputting different binary data into these eight ports, their time displays are different, so that we can get the desired time display and temperature. However, for the 20-pin AT89S52, there are too many pins for the eight-segment LED, so I choose 2764 chip to expand the pins of the main chip, 74LS 164 is the data shift register, and 74LS373 is also selected as the data cache.

When selecting devices, we should pay attention to the matching between decoder and display, including two aspects: first, power matching, that is, the driving power should be large enough. Because the working current of the digital tube is large, the decoder with large driving current or OC output decoder should be selected. The second is logic level matching. For example, * * * cathode LED digital tube adopts advanced effective decoder. The recommended display decoders are 74LS48, 74LS49 and CC45 1 1.

3.5 Display Circuit Structure and Principle

(1) Single-chip microcomputer usually has 7 LED segments to form an "8" structure. There is also a decimal point LED to display decimal places! There is a display of * * * Yin * * * Yang! The anode (male * * * terminal) of LED is called * * * anode display and the cathode is called * * * cathode display.

A one-bit display is composed of eight light-emitting diodes, of which seven light-emitting diodes constitute each stroke of the font "8", and the decimal point of the other light-emitting diode is. When a certain DC voltage is applied to a certain section of LED, the strokes of that section will become brighter; No voltage is darkness. In order to protect each LED from being damaged, a current limiting resistor should be added.

In this design, the ten digits of hours, minutes and seconds are displayed in seven segments, and the digits are displayed in eight segments, which makes it easier to distinguish hours, minutes and seconds.

(2)LED display interface and display mode

There are two kinds of LED displays: static display mode and dynamic display mode. Static display means that when a character is displayed on the display, the corresponding segment is continuously opened or closed until another character is displayed. When the LED display works in the static display mode, the cathode of each position is grounded; If it is a * * * anode, it is connected to a +5V power supply. The segment line of each bit is connected to the output port of an 8-bit latch. Each bit in the display is independent of each other, and once the display character of each bit is determined, the corresponding latch output will remain unchanged.

Because of this, the brightness of static display is higher. This display mode is easy to program and manage, but it takes up more I/O line resources. Therefore, in the case of a large number of display bits, the dynamic display mode is generally adopted.

Since all 6-bit segments are controlled by an I/O port, the 6-bit led will display the same character at any time. If you want to display different characters for each bit, you must light each LED by scanning, that is, only one character is displayed at a time. At this time, the segment selection control I/O port outputs the segment selection code (font code) of the corresponding character, while the bit selection control I/O port sends the on level (low level should be sent because the LED is negative) to ensure that the bit displays the corresponding character. This is done in turn, so that everyone can display the characters that this bit should display in time.

In order to simplify the circuit and reduce the cost when displaying multi-bit LED, all segments are connected in parallel and controlled by an 8-bit I/O port. * * * cathode (* * * anode) and * * * terminal are respectively controlled by corresponding I/O port lines to realize time-sharing gating.

Segment selection code and bit selection code delay 2MS after each transmission. Due to the persistence effect of human vision, it seems that every digital tube is on.

Figure 3.4 Six-position LED dynamic display circuit

3.6 Keyboard part

It is the simplest part of the whole system. According to the functional requirements, this system needs three buttons: control time, minute and second respectively. And independent keys are used.

Keys can be divided into two types according to the structural principle. One is contact switch buttons, such as mechanical switches and conductive rubber switches. The other is contactless switch buttons, such as electric buttons and magnetic induction buttons. The former has low cost and the latter has long service life. At present, the contact switch button is the most common in microcomputer system.

Keys can be divided into coded keyboards and non-coded keyboards according to the interface principle. The main difference between these two keyboards lies in the method of identifying key symbols and giving corresponding key codes. Coded keyboards mainly use hardware to identify keys, while non-coded keyboards mainly use software to define and identify keyboards.

The fully coded keyboard can automatically provide codes corresponding to the keys through hardware logic. In addition, it generally has a de-jitter and multi-key and cross-key protection circuit. This kind of keyboard is easy to use, but it needs more hardware and is expensive, so the general single chip microcomputer application system is rarely used. The non-coding keyboard only provides a matrix of rows and columns, and all other work is done by software. Because it is economical and practical, it is widely used in single chip microcomputer systems. Because this design only needs a few function keys, the independent key structure can be adopted at this time.

Independent bond is a single bond circuit directly composed of I/O port lines. Its characteristic is that each key independently occupies an I/O port line, and the work of each key will not affect the status of other I/O port lines. The typical application of independent keys is shown in Figure 3.5.

The configuration of single-machine key circuit is flexible and the software structure is simple, but each key must occupy an I/O port line. So when there are many keys, I/O port lines are wasted and should not be used.

Figure 3.5 Independent Key Structure Diagram

3.7 reset circuit

When reset, the CPU and other functional components in the system are in some initial state, and the computer will start working from this state after reset. During the reset period, the CPU did not start to execute the program, but was doing preparatory work.

No matter when the computer is just turned on, after power failure, or when the system fails, it needs to be reset.

The reset condition of 5 1 single chip microcomputer is realized by external circuit. When the clock circuit works, as long as there are more than two TP high levels on the RESET pin of the microcontroller, the microcontroller can be reset. But too short a time usually makes the reset part unreliable. To ensure the RESET, the high level on the reset pin should generally be kept above10 ms.

Common reset circuits include power-on reset and key reset circuits. Here we choose the key reset circuit.

(1) power-on reset circuit

The power-on reset circuit is realized by capacitor charging. At the moment when the power supply is turned on, the potential of the reset terminal is the same as VCC, both of which are +5V. With the charging of RC circuit, the potential of RESET gradually drops, and it can be RESET normally as long as the time to ensure the reset is high is more than 10 ms, as shown in Figure 3.6( 1).

Figure 3.6( 1) power-on reset circuit

(2) Key reset circuit

When the microcontroller is powered on, just press the K key in Figure 3.6(2) to reset. At this time, VCC is divided by resistors rs and Rk, and a reset high level is generated at the reset terminal.

In the circuit of Figure 3.6(2), interference easily enters the reset terminal. Although it will not cause the wrong reset of the single chip microcomputer in most cases, it may cause the wrong reset of some internal registers. At this time, the decoupling capacitor can be connected to the reset terminal.

In addition, some peripheral chips in the MCU application system also need to be reset. If the reset level requirements of these reset terminals are consistent with those of MCU, they can be directly connected to them. RC circuit is often connected to Schmidt circuit, and then to the reset end of single chip microcomputer. In this way, the system can have multiple reset terminals, thus ensuring the reliable synchronous reset of the external chip and the single chip microcomputer.

Figure 3.6(2) Key Reset Circuit

4 Software design

4. 1 program flow

Overall design of the program: timing module, display module, time adjustment module and state adjustment module.

(1) Overview: This part mainly introduces the timing module and display module. The timing part is timed by a classic timer. It realizes the main part of digital clock and stopwatch, as well as timing setting. Display module is another important part of digital clock, and its independence directly affects the visualization of digital clock. In this part of the design, a special display data buffer is set up, which is different from the data in data buffers such as minutes and time. The display segment code is stored in it, while the time data is stored in other buffers. When displaying, the time decimal data is first converted into display segment code, and then sent to the digital tube for display. The display segment code adopts dynamic scanning mode. When it is necessary to change the category of displayed data, it is only necessary to change the decimal data buffer where the pointer points to the data buffer.

(2) Time adjustment: There are many ways to adjust time. First, you can directly enter the relevant state for related operations. Second, the adjustment is divided into two steps, first entering the state and then operating, which are controlled by two keys respectively. The first method is direct and the design idea is simple, but there is a contradiction between the operation time and the number of control keys. If you use fewer keys, you may be in a waiting state for data adjustment after entering the state, which will affect the scanning speed of the display (the display part can be controlled by 8279 chip, which can solve this problem). Of course, in this way, you can also use multiple status keys, each of which can complete a corresponding data adjustment. If the second method is adopted, this will not happen. Since the state adjustment and state operation can be controlled by two keys respectively, the number of state adjustments can be as many as 256 times (theoretically). The operation is completed as follows: one key controls the adjustment of state and one key controls the adjustment of data. The above two methods can be realized by querying and interrupting. The two methods must pay attention to the problem that the process of related operations between them should not be too long, otherwise it will affect the display scanning. The inquiry method is more traditional, so I won't discuss it much. The following is some discussion on the realization of digital clock by interrupt, and some treatment of related problems. Based on the above discussion, it can be designed as follows: adjustment is divided into two parts: state adjustment and data adjustment, and only one operation is performed each time the interrupt is entered, and then it returns, so that it is not necessary to keep the interrupt waiting for adjustment, which can make the interrupt time-consuming very small. If the priority of timer interrupt is set to the highest level, the interrupt mode will not affect the clock counting and query mode.

(3) Problems that should be paid attention to in interrupt mode:

In the interrupt mode, it is best to set the priority of timer interrupt to the highest level. Regarding the stability of program data, we should pay attention to two issues: First, when responding to low-priority interrupts, when putting data into stack protection, we should prohibit high-priority interrupts from responding. 2. After the relevant data is put on the stack, the status bits and registers that have an impact on the execution of the interrupt program must be restored to the values in the reset state. For example, when using decimal adjustment, when the interrupt comes in, the AC and CY bits in PSW need to be cleared, otherwise the decimal adjustment is wrong.

(4) Discussion on timing accuracy:

The timer in the program is always running, that is to say, the timer is running in an ideal state, and its interrupt program is executed every 0. 1 second. In an ideal state, there is no systematic error in timer timing. However, after the timer interrupt overflows, the timer starts counting from 0 until it is reset, so the timer timing error is caused by the time spent from the interrupt overflow to the interrupt response of the timer reset. If the timer is set when the timer is not turned off at the beginning of the interrupt program, the error is the smallest, about every 0. 1 sec 7- 12 machine cycles. Of course, this is the case when the timer is just 0. 1 sec. From the above analysis, if the digital clock is designed to query or the timer interrupt is set to the highest level in interrupt mode, we can appropriately deduct the time value of 9 machine cycles when setting the timing value. However, if the timer interrupt is not set to the highest level in the case of interrupt, it is necessary to deduct the corresponding time value when setting the timing value according to the size of the interrupt program.

(5) Software vibration reduction:

Jitter can be realized by hardware (Schmitt trigger), as shown in Figure 4.4, or by software. Only the software mode is discussed here. Software jitter elimination includes timer timing and using delay subroutine. 1. The elimination of timer timing jitter cannot affect the scanning speed of the display module. The realization method is: set the flag bit, set it in the timer interrupt, and then query it in the program. Set its interrupt priority to be lower than the clock timing interrupt, then it will not affect the clock timing at all. Secondly, when using the delay subroutine, if the scanning speed of the display module is not very fast, it may affect the display effect at this time. Under normal circumstances, the scanning times per second should not be less than 50 times, otherwise the digital display will flash. Therefore, the delay time of the delay subroutine should be less than 20ms. If a timer is used, the delay time will not affect the clock.

If the design uses interruption to complete related operations, software can also be used to eliminate jitter. The processing idea is that interrupts cannot be executed continuously, and there is a certain time interval between them.

4. 1. 1 system main program flow chart

Figure 4. 1 main program flow chart

4. 1.2 Flowchart of each subroutine

Figure 4.2 The flow chart of the clock adjustment subroutine is hoped to be helpful to you.