Abstract: In electronic and communication products, high-precision sinusoidal signals are often needed, but the frequency stability and accuracy of traditional sinusoidal signal generators are often low when they output at low frequency. This paper introduces a monolithic sinusoidal signal generator chip ML2035 from Micro Linear Company, which can generate sinusoidal signals from DC to 25kHz without other peripheral devices, and designs a simple sinusoidal signal generator circuit by using this chip.
Key words: signal generator, signal source, sinusoidal signal, ML2035, DDS.
catalogue
1. Introduction
2. Technical overview
3. Demand analysis stage
3. 1 function module diagram
3.2 data flow chart
3.3 E-R diagram
3.4 Business Flow Chart
4. Design stage (program flow chart)
5. Detailed design stage (operation screenshot)
6. Installation and debugging stage
7. Design experience
1. Introduction
The concept of 1. 1 signal generator
An electrical test signal instrument that generates the required parameters. According to its signal waveform, it can be divided into four categories: ① sine signal generator. It is mainly used to measure the frequency characteristics, nonlinear distortion, gain and sensitivity of circuits and systems. According to the different performance and use, it can be subdivided into low-frequency (20 Hz to 10 MHz) signal generator, high-frequency (100 KHz to 300 MHz) signal generator, microwave signal generator, swept frequency and program-controlled signal generator, frequency synthesis signal generator and so on. ② Function (waveform) signal generator. It can generate some specific periodic time function waveforms (sine wave, square wave, triangle wave, sawtooth wave and pulse wave, etc.). ) signal, the frequency range can be from several megahertz to tens of megahertz. Besides testing communication, instruments and automatic control systems, it is also widely used in other non-electric measurement fields. ③ Pulse signal generator. The generator capable of generating rectangular pulses with adjustable width, amplitude and repetition frequency can be used to test the transient response of linear systems, or to test the performance of radar, multi-channel communication and other pulse digital systems as analog signals. ④ Random signal generator. There are usually two kinds: noise signal generator and pseudo-random signal generator. The noise signal generator is mainly used to introduce random signals into the system under test, simulate the noise under actual working conditions and measure the system performance. Add a known noise signal and compare it with the internal noise of the system to determine the noise coefficient; Random signals are used to measure the dynamic characteristics of the system instead of sine or pulse signals. When the correlation function is measured by noise signal, if the average measurement time is not long enough, there will be statistical error, which can be solved by pseudo-random signal.
As the most basic electronic instrument in the field of electronic technology, sine signal generator is widely used in aerospace measurement and control, communication system, electronic countermeasures, electronic measurement, scientific research and other fields [1 ~ 2]. With the development of electronic information technology, the requirements for its performance are getting higher and higher, such as high frequency stability, fast conversion speed, amplitude modulation, frequency modulation and phase modulation functions. In addition, it is often required that two sinusoidal signals not only have the same frequency, but also have a certain phase difference.
There are usually two ways to determine the phase difference between two signals: one is to use phase shifters, such as resistance-capacitance phase shifters, inductive phase shifters and inductive voltage divider phase shifters. This method has many shortcomings, such as the phase-shifting accuracy is greatly influenced by the characteristics of components, the phase-shifting accuracy is poor, the phase-shifting operation is inconvenient, and the phase-shifting angle is shifted by factors such as load and time. The other is to adopt digital phase-shifting technology, which is the development trend of phase-shifting technology at present [3]. The core of digital phase-shifting technology is to digitize the analog signal or phase-shifting angle first, and then restore it to analog signal after phase-shifting. In this paper, a dual-channel sinusoidal signal generator is designed by using direct digital frequency synthesis technology, which can output two sinusoidal signals with the same frequency and adjustable phase difference. These two channels can also be used for frequency modulation, amplitude modulation and phase modulation independently. The signal generator has the advantages of high frequency stability and fast frequency and phase modulation speed.
Sinusoidal signal source is a widely used signal source, and with the development of technology, the requirements for it are getting higher and higher. When the traditional sine signal generator outputs at low frequency, the frequency stability and accuracy are often very low. We know that in order to obtain a signal source with high frequency stability, phase-locked loop is often used, but this method has complex circuit and huge volume. In recent years, DDS technology is widely used in electronic measurement, radar system, FM communication, electronic countermeasures and other fields because it is easy to generate signals with fast frequency conversion, high resolution and controllable phase. However, if the DDS chip of Analog Company is selected to develop a low-frequency sinusoidal signal generator, an external microprocessor is often needed, so the circuit is complicated and the frequency stability is not good. Therefore, this paper will discuss a simple sinusoidal signal generator based on ML2035, which has the characteristics of few peripheral devices, simple circuit implementation and no need for an external microprocessor.
2. Technical overview
Basic principle of 1 direct digital frequency synthesizer
Frequency synthesis refers to the technology of generating a large number of discrete frequencies with the same accuracy and stability through a series of arithmetic operations at a standard signal frequency. There are many ways to realize frequency synthesis, among which direct digital frequency synthesis technology has incomparable advantages over traditional frequency synthesis technology, such as fast frequency switching speed, high resolution, easy control of frequency and phase, etc. [4 ~ 5], so it has been more and more widely used in modern electronic systems and equipment, and has become the first choice for frequency source design.
The direct digital frequency synthesizer consists of a reference clock, a phase accumulator, a sine look-up table and a D/A converter, as shown in figure 1.
Direct digital frequency synthesis technology is to sample, quantize and encode sine signal according to phase interval, and then store it in EPROM to form sine look-up table. During frequency synthesis, the phase accumulator counts the clock pulses under the action of the reference clock, and at the same time, adds the accumulated phase output by the accumulator to the phase increment preset by the frequency control word K to form the sine lookup table address added with Ji Guo; Take out the amplitude quantization sine function value in the cell corresponding to the phase in the table, output the analog signal through the D/A converter, and smooth it through the low-pass filter to get the analog signal that meets the requirements. The maximum counting length of the phase accumulator is the same as the number of phase separation points stored in the sine look-up table. Because the phase increment of the phase accumulator is different, the number of sampling points in a period will be different, and the frequency of the output signal will change accordingly when the sampling frequency (determined by the reference clock frequency) is unchanged. If the initial phase of the accumulator is set, the output signal can be phase controlled. According to the sampling principle, if two identical frequency synthesizers are used, and their reference clocks are the same, and the same frequency control word and different initial phases are set, it is possible to output two signals with the same frequency but a certain phase difference in principle.
AD9852 is a highly integrated direct digital frequency synthesizer with adjustable frequency, phase and amplitude, which is produced by ADI. It integrates high-performance D/A converter, high-speed comparator, program register, reference clock multiplier and high-performance digital control unit which can realize various operations, and can realize full digital programming control. The frequency control word of the output signal of AD9852 is 48 bits, which makes the output frequency adjustment resolution reach 1μHz, the frequency range of the output signal can be from DC to 150MHz, the phase adjustment control word is 14 bits, the phase adjustment resolution is 0.022 bits, and the amplitude adjustment control word is 12 bits.
ML2035 is a monolithic sine signal generator chip of Micro Linear Company. It can generate sinusoidal signals from DC to 25kHz without other peripheral devices, and its output sinusoidal signal frequency can be controlled by 16 bit serial bit words. Therefore, ML2035 can be widely used in wireless communication, modulation and demodulation and other fields that need low-cost and high-precision sinusoidal signal generators. The main features of ML2035 are as follows:
The frequency of output sine signal is from DC to 25kHz；;
It has low gain error and low harmonic distortion performance;
It has three-wire SPI-compatible serial microprocessor interface and data latch function;
It has the function of fully integrated solution without peripheral equipment;
The frequency resolution can reach 1.5Hz (when the input clock frequency is 0);
Independent internal crystal oscillator;
It has synchronous and asynchronous data loading functions.
Generation of sinusoidal signal
The basic principle of ML2035 is the same as DDS, which is mainly composed of sine signal generation, crystal oscillator and serial digital interface. But the peripheral circuit of ML2035 is extremely simple, with only 8 pins. The basic principle of ML2035 programmable frequency generator is exactly the same as that of direct frequency synthesizer (DDS). As we know, DDS chip generally consists of frequency control word, phase accumulator, sine look-up table, D/ A converter and low-pass filter. The core component of DDS chip is phase accumulator, which consists of an N-bit adder and an N-bit phase register. It is similar to a simple counter. Every clock pulse comes, the output of the phase register increases by one step, and the adder adds the frequency control data with the accumulated phase data output by the accumulation register, and sends the addition result to the data input end of the accumulation register. The phase accumulator enters linear phase accumulation, and when it reaches full scale, it will produce counting overflow, which is the output frequency of DDS. Sine look-up table is a programmable read-only memory (PROM), which uses phase addresses to store the sampling code values of periodic sine signals, including the digital amplitude information of periodic sine waves, and each address corresponds to a phase point in the range of. The data obtained by adding the output of the phase register and the phase control word is used as an address addressing sine lookup table, which maps the input address phase information into a sine wave amplitude signal, drives the DAC and outputs an analog signal; The low-pass filter smoothes and filters out unnecessary sampling components, thus outputting a sine wave signal with pure spectrum.
Because the control word length of ML2035 is 16 bits, according to the DDS principle, it is not difficult to get the output frequency relationship of ML2035 as follows.
( 1)
Therefore, the frequency resolution (minimum frequency) of ML2035 is
(2)
3. Demand analysis stage
I. Design tasks
A waveform generator is designed and manufactured, which can generate sine wave, square wave, triangular wave and user-editable waveform.
Waveforms with specific shapes.
Second, the design requirements
1. Basic requirements
It has three periodic waveforms: sine wave, square wave and triangular wave.
The linear combination waveform of the above three waveforms (same period) is edited and generated by keyboard input, and the fundamental wave and its harmonics (
5 times or less).
With waveform storage function.
The output waveform frequency is 100 Hz ~ 20kHz (non-sine wave frequency is calculated as 10 th harmonic): the repetition frequency is adjustable, and the frequency is adjustable.
Rate step interval ≤ 100Hz.
The amplitude range of output waveform is 0 ~ 5v (peak-to-peak), which can be adjusted in steps of 0. 1V (peak-to-peak).
It has the function of displaying the type, repetition frequency (period) and amplitude of output waveform.
2. The role played
The frequency range of output waveform is extended to 100 Hz ~ 200 kHz.
Use a keyboard or other input device to generate arbitrary waveforms.
Increase the stable amplitude output function, when the load changes, the output voltage amplitude changes less than 3% (load voltage change range
: 100Ω~∞)。
With power-off storage function, it can store waveforms and settings edited by users before power-off.
Can generate a single or multiple times (less than 1000 times) specific waveform (such as generating a semi-periodic triangular wave output).
Others (such as adding functions such as spectrum analysis, distortion analysis, frequency expansion > > 200KHz, swept frequency output, etc.).
Third, the scheme design and demonstration:
According to the requirements of the project, we put forward three design schemes, which are introduced as follows:
1, scheme 1
A single-chip voltage-controlled function generator ICL8038 with low temperature drift, low distortion and high linearity is used to generate a sine wave with controllable frequency.
, can realize the numerical control frequency adjustment. The amplitude of output signal is controlled by D/A and 5G353. The frequency of the output signal,
The amplitude parameter is input by 4x4 keyboard, and the result output is displayed by 6-bit LED. The storage of user setting information is completed by 24C0 1.
All right. The system structure block diagram is shown in figure 1.
2. Option 2
The signal generated by the 2M crystal oscillator is divided by 8253 to generate a square wave signal of 100Hz. PLL CD4046 and 8253.
N-way frequency division, the output signal is sent to sine wave generation circuit and triangle wave generation circuit, in which sine wave is generated by looking up the table.
Healthy. As an address signal, the output of the counter reads out the waveform data of memory 28 17 and sends it to DAC0832 for D/A.
Convert and output various voltage waveforms, which can be combined to obtain various waveforms. The amplitude of the output signal comes from 0852.
Line adjustment. The display interface of the system adopts 16 word x 1 line LCD, and the signal parameters are input through 4x4-bit keyboard. Users can set information.
The storage is completed by 24C0 1
3. Option 3
With 4M crystal oscillator as reference source, high-speed and high-speed output signals are obtained through a precise phase accumulator composed of F374, F283 and LS 164.
D/A converter and ROM generate sine wave, and this digital sine wave passes through an analog filter to get the final mode.
Quasi-signal waveform Digital sine digital waveform and triangular digital waveform are generated by high-speed D/A, and digital sine wave is bandpass.
After filtering, the corresponding analog sine wave signal is obtained. Finally, the analog sine wave is compared with the threshold to get the square.
Radio clock signal. Through the phase accumulator, the in-phase output of various waveforms can be realized, and the frequency can be changed continuously.
The output signal amplitude is digitally controlled by TLC7524. The storage of user setting information is completed by 24C0 1.
The following are the specific circuit implementations of the three basic schemes:
Scheme No.1
The single-chip voltage-controlled function generator ICL8038 generates a sine wave with the frequency of 100 Hz ~ 20 Hz, and its frequency is controlled by DAC0832 and 5G.
353 control. Due to the limitation of ICL8038, the output frequency stability is only 10-3(RC oscillator). and
Because of the nonlinearity of voltage control, it is difficult to control the step size of frequency stepping. The amplitude of the output signal is digitally controlled by DAC0832 and 5.
G353 complete. The amplitude is input by single chip microcomputer through P0 port. The required amplitude data is 8 bits/1100mv. User setting letter
The storage of information is completed by 24C0 1.
The microcontroller consists of 805 1 minimum system, keyboard/display interface chip 8279, 16-bit keyboard, 6-bit LED digital display and
Correspond decoding, drive circuit and "automatic scanning/manual setting" selector switch.
Option 2
Basic signal generation: the crystal oscillator frequency is 2M, and after frequency division of 8253, a square wave signal of 100HZ is generated, and the frequency division ratio is.
：
M=fALE/ 100=2X 104
Where FALE=2M.
The frequency stability of quartz crystal oscillator is generally better than 10-5, so the frequency stability index of output signal can be guaranteed.
Frequency synthesis: in the phase-locked loop composed of CD4046 and CD 8253, fo= 100N, where the timer of 8253 is divided by n of 4046,
Then the frequency of the input pulse signal of the duty cycle circuit is also n.
Using the three timers of programmable timer/counter 8253, we can just undertake the above 2x 104 frequency division and PLL.
And the task of frequency divider. The frequency division ratio of Timer 0 is set to 2x 104, and Timer 2 adopts PLL frequency division. Use 8253
As a frequency divider, it should work in mode 3.
Waveform transformation adopts look-up table method, which divides the waveform of a sine wave into 100 points on average according to time, and the electricity of each point
The compressed data is stored in memory 28 17, and can be queried and output in real time through DA0832.
The digital control of the amplitude of the output signal is completed by DAC0832, and the amplitude digital is input by single chip microcomputer through P 1 port. The required amplitude data are
8 bits/100 millivolts. When the output amplitude is 3V, the DAC input value should be 240.
The microcontroller system consists of 89C5 1 minimum system, 4x4 keyboard input, character LCD display and corresponding decoding.
The driving circuit is formed. Liquid crystal display adopts menu display mode, which is intuitive, easy to operate and has a very friendly man-machine interface.
The storage of user setting information is completed by 24C0 1.
Option 3
A 4M crystal oscillator is used as the reference source, and a precise phase accumulator and a digital signal consisting of F273, F283, LS 164 are used.
Processing, sine wave, triangle wave and arbitrary wave are generated by high-speed D/A converters DAC0800 and 28 17 E2ROM.
Sinusoidal signal frequency calculation: In the phase accumulator, every time a clock pulse comes, its content is updated. at certain intervals
At the next update, the phase increment m of the phase increment register is added to the phase accumulated value in the phase accumulator. Hypothetical stage
The m of the increment register is 00...0 1, and the initial value of the phase accumulator is 00...00. At this time, the phase is tired in each clock cycle.
Add 00...0 1 to all adders. In this design, the bit width n of the accumulator is 24 bits, and the phase accumulator needs 224 clock cycles.
The initial value can be restored.
The output of the phase accumulator is used as a sine lookup table, a triangle lookup table and a user-defined waveform lookup table (both are
E2PROM28 17)。 Each address in the look-up table represents a phase point of the waveform of one cycle, and each
Each phase point corresponds to a quantized amplitude value. Therefore, this look-up table is equivalent to a phase/amplitude converter, which will
The phase information of the phase accumulator is mapped into digital amplitude information, and the digital amplitude value is used as the input of the D/A converter.
Design n=24, M= 1, and the corresponding output signal frequency is equal to the clock frequency divided by 224. If M=2, output
The frequency is increased by 1 times. For an N-bit phase accumulator, there are 2n possible phase points, namely phase increments.
The control word m in the register is the value added to the phase accumulator every clock cycle. Assuming that the clock frequency is fc, then
The frequency of the output signal is:
f0 = M*fc / 224
After the digital sine wave passes through the analog filter, the final analog signal waveform is obtained. Generating digital positive through high-speed DAC
Chord digital waveform and triangle digital waveform, and the digital sine wave passes through the band-pass filter to get the corresponding analog sine wave.
Finally, the simulated sine wave is compared with the threshold to obtain the square wave clock signal.
The amplitude numerical control of the output signal is completed by TLC7524 numerical control attenuator, and the amplitude number is addressed and input by single chip microcomputer through bus.
In, the amplitude is 8 bits/1100mv. When the output amplitude is 5V, the DAC input value is 400.
The single chip microcomputer system consists of 89C52 minimum system, 4x4 keyboard input, character LCD display and corresponding decoding.
The driving circuit is formed. Liquid crystal display adopts menu display mode, which is intuitive, easy to operate and has a very friendly man-machine interface.
. The storage of user setting information is completed by 24C0 1.
4. Scheme comparison
The performance characteristics and implementation difficulty of the three schemes are analyzed and compared in detail below.
1) scheme 1 has a simple structure, but due to the limitation of ICL8038, RC oscillator is adopted, so the output frequency is stable.
Calibration can only reach the order of 10-3. The second scheme adopts quartz crystal oscillator and digital phase-locked loop technology, while the general synchronization
The frequency stability of the crystal oscillator is better than 10-5, so the frequency stability index of the output signal can be guaranteed. Similarities of scheme 3
The sample adopts quartz crystal oscillator and precision phase accumulator, and the frequency stability index is also better than 10-5. reach goals
Requirements.
2) Scheme 1: Because the linear range of the voltage controlled oscillator F/V is limited, it is difficult to control the step size of frequency stepping and maintain it.
The frequency coverage coefficient is 1000 times. The second scheme adopts integrated phase-locked loop 4046, and it is easy to realize 1000 times with 8253.
Linear frequency coverage coefficient. The third scheme adopts precision phase accumulator and high-speed DAC, which can also achieve 1000 times linearity.
Frequency coverage.
3) The control display system of the first scheme is relatively simple, and the display system of six-position LED is relatively simple to manufacture, but the display system is relatively difficult.
The detailed information of the output signal is difficult to operate and the man-machine interface is difficult to understand. Scheme II and Scheme III
Using 16 characters for LCD x 1 line and menu operation requires high hardware production level and software programming skills.
Operation, but can display waveform, duty cycle, signal amplitude and other information in detail. Man-machine interface is friendly and easy to operate. but
And through software programming control, the frequency and waveform preset of the system output signal becomes very simple.
4) In the first scheme, in order to obtain the resolution of 1Hz, high-precision DAC must be adopted, which is not easy to achieve high precision.
In the second scheme, the 8253 programmable timer is controlled by a single chip microcomputer, and the integrated PLL frequency synthesizer 4046 can be used.
It is easy to provide a resolution of 1Hz. The third scheme adopts precision phase accumulator, which has quite good frequency resolution and frequency.
The controllable range of speed is 0.25Hz.
Fc/2n = 222/224 = 0.25 Hz
5) ICL8038 in the first scheme can generate more accurate waveforms. Scheme 2 outputs sine wave through real-time query, although
We only use 100 points for each waveform, but we can take more points for each waveform under higher requirements.
Point method for improving waveform accuracy. It has good upgrade and expansion performance. In scheme 3, E2PROM stores 1024.
Waveform points can provide very accurate waveforms. At 200KHz, 8 points can still be provided for each waveform.
After passing through the filter, there will also be a good waveform.
6) The frequency conversion time of the first scheme and the second scheme is mainly the processing time of the feedback loop and the response time of the voltage controlled oscillator.
, usually greater than1ms. The frequency conversion time of the third scheme is mainly digital processing delay, usually tens of ns.
7) Because of the RC oscillator, the scheme 1 inevitably has large phase noise. The phase noise of the second scheme is it.
The reference clock-quartz crystal oscillator-has twice the noise. The third scheme is due to the phase and time of the digital sine signal.
There is a linear relationship between them, and the phase noise of the whole circuit output is less than that of its reference clock source.
From the comparison of the above schemes, it can be seen that the third scheme is more complicated in structure, but it has the advantages of high output frequency stability and low frequency loss.
Good linearity, high frequency resolution, accurate waveform, short frequency conversion time, low phase noise and friendly man-machine interface.
And has excellent performance. It is an ideal design scheme of this design. Relatively speaking, the first scheme structure
It is simple, but the output signal has poor frequency linearity, low frequency stability, low frequency resolution and low frequency.
The rate conversion time is long, the phase noise is large, and the man-machine interface is unfriendly. The circuit of that second scheme is also relatively simple,
But it is worse than the third scheme in frequency resolution, frequency conversion time and phase noise. In short, plan one and
Both schemes have their own weaknesses, so it is difficult to meet the ideal design requirements. Therefore, it is not suitable.
After comparison, we decided to adopt the circuit design of scheme 3 for production.
Serial digital interface
The control of ML2035 can be realized through the serial digital interface of the chip, and the digital interface part is mainly composed of shift registers and data latches. The 16 bit data word on the SID pin is sent to the 16 shift bit register on the rising edge of the clock SCK. It should be noted that the lowest bit should be sent first and the highest bit should be sent last. Then, triggered by the falling edge of LAI, the data sent to the shift register is latched into the data latch. In order to ensure the effective latching of data, the falling edge of LAI should appear during the period when SCI is at the "low" level. Similarly, when the SID data is shifted into the shift register, the LAI should be kept at the "low" level.
Power supply mode
ML2035 has the power supply "sleep" function, which can effectively improve the power supply efficiency and is extremely beneficial to portable products. When it is desired to keep the ML2035 "dormant", all zeros can be input to the shift register, and "1" can be loaded to the LATI to keep its high level. In this case, the power consumption of ML2035 can be reduced to below 1 1.5 mW, and the amplitude of the output sinusoidal signal can be reduced to 0 V. It should be mentioned that the power input of ML2035 should be decoupled in the circuit design, and the power decoupling treatment scheme as shown in figure 1 can be adopted in the circuit design.
Figure 1 ML2035 power supply decoupling processing method
Design of Simple Sinusoidal Signal Generator
According to the basic principle of DDS, due to the limited frequency resolution of ML2035, the output sinusoidal signal may have errors. There will be different frequency errors for different reference clocks. Table 1 shows the frequency control word and frequency error of ML2035 under ordinary crystal oscillator.
Table 1 Frequency control word and frequency error required by ML2035 when using ordinary standard crystal oscillator
In this paper, a simple sinusoidal signal generator with the frequency of 1000Hz is designed by using ML2035. Because the crystal oscillator below 3.5MHz is usually expensive and bulky, the crystal oscillator of 6.5536 is chosen here. According to the formula (1), the required frequency control word is 1280, so the required11d101000000. Fig. 2 is a schematic circuit diagram of a simple sinusoidal signal generator, in which 74HC4060 counter is used as an oscillator and timer, and 74HC4002 is a high-speed CMOS quad NAND gate device. In order to realize that the frequency of the output sinusoidal signal of ML2035 is 1000Hz, it is necessary to shift the first eight pulses to 8-bit zeros, and then shift them to111010 in the last eight pulses.
Circuit schematic diagram of 1000Hz sine signal generator based on ML2035.
Third, software articles.
Functions completed by AVR:
1, handling communication
2. Calculate the parameters needed to generate the signal.
3.SPI communication, which outputs data to FPGA and reads data from FPGA.
4. Calculate the parameters of the measured signal according to the collected data.
There is nothing to talk about communication and algorithms here. Let me talk about SPI communication first. I don't use AVR SPI peripherals, I use ordinary I/O.
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