First, the design purpose
Digital clock is a device that uses digital circuit technology to realize the timing of hours, minutes and seconds. Compared with mechanical clock, it has higher accuracy and intuition, and has no mechanical device and longer service life, so it has been widely used.
Digital clock is a typical digital circuit in principle, including combinational logic circuit and sequential circuit.
So we designed the digital clock this time to understand the principle of the digital clock and learn how to make it. Moreover, through the production of digital clock, we can further understand the functions and practical methods of various small and medium-sized integrated circuits used in production. Moreover, because the digital clock includes combinational logic circuits and timing circuits, we can further learn and master the principles and usage methods of various combinational logic circuits and sequential circuits through it.
Third, the principle block diagram
1. Composition of digital clock
A digital clock is actually a counting circuit that counts the standard frequency (1HZ). Since the starting time of counting cannot be consistent with the standard time (such as Beijing time), it is necessary to add a time correction circuit to the circuit, and the standard 1HZ time signal must be accurate and stable. Generally, a quartz crystal oscillator circuit is used to form a digital clock.
(1) Block diagram of digital clock composition
2. Crystal oscillator circuit
The crystal oscillator circuit provides a stable and accurate square wave signal with the frequency of 32768 Hz for the digital clock, which can ensure the accuracy and stability of the digital clock. Crystal oscillator circuits are used for analog and digital electronic clocks. Generally, there are two types of digital crystal oscillator circuits with square wave output. One is composed of TTL gate circuits; The other is a circuit composed of CMOS NOT gate, which is adopted in this design. As shown in Figure (b), the crystal oscillator circuit is composed of CMOS NOT gate U 1, crystal, capacitor and resistor, and U2 realizes the shaping function and converts the waveform output by the oscillator into an ideal square wave. The output feedback resistor R 1 provides bias for the NOT gate, which makes the circuit work in the amplification region, that is, the NOT gate functions like a high-gain inverting amplifier. Capacitors C 1 and C2 form a resonant network with the crystal, control the oscillation frequency, and provide a phase shift of 180 degrees, thus forming a positive feedback network with the NAND gate and realizing the function of the oscillator. Because the crystal has high frequency stability and accuracy, the stability and accuracy of the output frequency are guaranteed.
(b) CMOS crystal oscillator (analog circuit)
3. Timing circuit
Generally, 10 decimal counters such as 74HC290 and 74HC390 are used to realize the counting function of the time counting unit. This design selects 74HC390. According to its internal logic diagram, it is a dual 2-5- 10 asynchronous counter, and each counter has an asynchronous zero clearing terminal (active at high level).
The second counting unit is a decimal counter, so there is no need for decimal conversion, just connect QA with CPB (effective falling edge). CPA (falling invalid) is connected to the input signal of 1 Hz second, and Q3 can be connected to the CPA of decimal counting unit as the carry-up signal.
The second decimal counting unit is a hexadecimal counter, which needs decimal conversion. The circuit connection method for converting decimal counter into hexadecimal counter is shown in Figure 2.4, in which Q2 can be used as an uplink carry signal to be connected with CPA with frequency division counting unit.
Decimal-hexadecimal conversion circuit
The circuit structures of fractional bit and fractional decimal counting units are exactly the same as those of fractional bit and fractional decimal counting units respectively, except that Q3 of fractional bit counting unit should be connected to CPA of fractional decimal counting unit as an uplink carry signal, and Q2 of fractional decimal counting unit should be connected to CPA of time decimal counting unit as an uplink carry signal.
The circuit structure of the hour bit counting unit is still the same as that of the second or hour bit counting unit, but it is required that the whole hour bit counting unit should be a decimal counter instead of an integer multiple of 10, so it is necessary to combine the hour bit counting unit and the decimal bit counting unit into a whole for decimal conversion. The circuit for realizing decimal counting function with a block of 74HC390 is shown in Figure (d).
Decimal circuit
Furthermore, in the circuit shown in fig. (d), the remainder binary counting unit can be used to convert the 2 Hz output signal of the frequency divider into a 1 Hz signal.
4. Decoding drive and display unit circuit
Select CD 45 1 1 as the display decoding circuit; Select LED digital tube as the display unit circuit. The input binary signal is translated into decimal digits by CD45 1 1, and then displayed by the digital tube. The LED digital tubes here are connected in a * * * way.
The counter realizes the accumulation of time, and sends it to CD45 1 1 chip in the form of 842 1BCD code, and then the 45 1 1 chip converts BCD code into decimal code and sends it to the digital tube for display.
5. Timing circuit
Digital clock should have the function of minute correction and time correction, so it is necessary to cut off the direct counting channel of minutes and hours and use a circuit that can switch between normal timing signal and correction signal at any time. That is, the time or branch time circuit realized by COMS and NOR gate, In 1 is terminated with low carry signal; In2 terminates the correction signal, which can be directly taken from the 1HZ or 2HZ (not too high or too low) signal generated by the frequency divider; The output end is connected with the minute or hour timing input end. When the switch is turned off, because the output of the correction signal and phase 0 is 0, and the other end of the switch is connected to a high level, the normal input signal can smoothly pass through the AND gate, so the timing correction circuit is in a normal timing state; When the switch is up, the situation is just the opposite, and the timing circuit is in the timing state.
In practical use, due to the jitter problem of the circuit switch, an RS trigger is usually connected to form a switch jitter elimination circuit, so the whole timing circuit is shown in Figure (f).
(f) Correction circuit with image stabilizer circuit.
6. Time telling circuit
The circuit should start to tell the time within 10 second before the hour, that is, when the time is between 59 minutes and 59 minutes and 59 seconds, the time telling circuit will inform the time control signal.
When the time is from 59 minutes and 50 seconds to 59 minutes and 59 seconds, the quantile, quantile and number of seconds remain unchanged, which are 5, 9 and 5 respectively. Therefore, QC and QA of minute counter, QD and QA of unit and QC and QA of second counter can be combined to generate time control signal.
The time-telling circuit can be composed of 74HC30. 74HC30 is an 8-input NAND gate.
Fourth, components
4.* * * Six-Yin Eight-Segment Digital Tube
5. Network cable 2m/ person
6.6.CD45 1 1+0 integrated block is 6 pieces.
7.CD 4060 integrated block 1 block
8.74HC390 integrated block 3 pieces
9.74 HC 5 1 integrated block 1 block
10.74HC00 4 integrated blocks
1 1.74hc30 integrated block 1 block
Five12.10Ω resistors.
13.500Ω resistance 14
2 14.30p capacitors.
15.32.768k clock crystal 1.
16. Buzzer 10.
Verb (abbreviation for verb) Circuit diagram of each function block.
Digital clock is a typical digital circuit in principle, which can be composed of many small and medium-sized integrated circuits, so it can be divided into many independent circuits.
(1) Hexadecimal circuit
It consists of 74HC390, 7400, digital tube and 45 1 1. The circuit is shown in figure 1.
(2) Decimal circuit
It consists of 74HC390, 7400, digital tube and 45 1 1. The circuit is shown in Figure 2.
(3) sexagesimal circuit
It consists of two digital tubes, two 45 1 1, a 74HC390 and a 7400 chip. The circuit is shown in Figure 3.
(4) Double sexagesimal circuit.
It is formed by connecting two sexagesimal, and the input signal of one bit is connected with Qc of ten bits per second to generate carry. The circuit diagram is shown in Figure 4.
(5) Time counting circuit
It consists of 1 decimal circuit and 2 hexadecimal circuits. Because there are double sixty circuits on it, just connect the decimal circuit. See Figure 5 for the detailed circuit.
(6) correction circuit
It consists of 74CH5 1D, 74HC00D and resistor. The calibration circuit is divided into two parts: sub-calibration and time calibration. The circuit is shown in Figure 6.
(7) crystal oscillation circuit
It consists of a crystal, two 30pF capacitors, 1 4060s and a 10M resistor. Pin 3 of the chip outputs a 2Hz square wave signal. The circuit is shown in Figure 7.
(8) the hour circuit
It consists of 74HC30D and buzzer. When the time is from 59:50 to 59:59, the buzzer will tell the time. The circuit is shown in Figure 8.