I. Introduction

(1) Introduction

At the end of the 20th century, electronic technology has made rapid development. Driven by it, modern electronic products have penetrated into almost every field of society, which has effectively promoted the development of social productive forces and the improvement of social informatization level. At the same time, the performance of modern electronic products is further improved, and the pace of product upgrading is getting faster and faster.

Time is always so precious to people, and the busyness and complexity of work can easily make people forget the current time. Forgetting what to do, when things are not very important, is harmless. However, once something important happens, a temporary delay may lead to great disaster. For example, many fires are caused by people forgetting to turn off the gas or forget the charging time. Especially in the hospital, every time the nurse will give the patient a skin test to test whether the patient is allergic to drugs. After the injection, you usually have to wait for 5 minutes. Once the time is up, the skin test will be invalid. Watches are certainly a good choice, but with the increase in the number of people who have skin tests, it is difficult to judge whose skin tests have been made. Therefore, we should make a timing system. Remind these people who forget the time at any time.

The digitalization of clocks and watches has brought great convenience to people's production and life, and greatly expanded the original time-telling function of clocks and watches. Such as timing automatic alarm, timing automatic ringing, timing program automatic control, timing broadcasting, timing switch circuit, timing switch oven, switching power supply equipment, and even the automatic start of various timing electricity. All this is based on the digitalization of clocks. Therefore, it is of great practical significance to study the digital clock and expand its application.

(2) The research content and structure of the paper.

The system consists of quartz crystal oscillator, frequency divider, counter, display and time correction circuit. The signal output by the decoder is displayed by LED digital tube. Adopt 74LS series small and medium-sized integrated chips. A time calibration circuit using RS flip-flop. The overall scheme design consists of two parts: the main circuit and the expansion circuit. The main circuit completes the basic function of the digital clock, and the expansion circuit completes the expansion function of the digital clock. This article is arranged as follows:

1. The introduction expounds the practical significance of studying electronic clocks.

2. Design content and design scheme The specific design scheme and design requirements of the electronic clock are discussed.

3. The design, principle and device selection of unit circuit mainly expounds the design principle and device selection of electronic clock from five aspects: quartz crystal oscillator, frequency divider, counter, display and time correction circuit.

4. Draw the schematic diagram of the whole machine. The design, installation and debugging of the system have all been completed.

Second, the design content and design scheme

(A) the design content requirements

1. Design an electronic clock with the functions of "hour", "minute" and "second" (23 hours, 59 minutes and 59 seconds) display and time adjustment.

2. The electronic clock is composed of small and medium-sized integrated circuits, which are assembled and debugged in the experimental box.

3. Draw the block diagram and logic circuit diagram.

4. Function expansion:

(1) alarm clock system

(2) tell the time. 59 minutes, 5 1 sec, 53 seconds, 55 seconds, 57 seconds, 750Hz audio signal, 59 minutes, 59 seconds, 1000Hz signal, audio-visual duration 1 sec, 1000Hz audio-visual end time is the whole hour.

(3) Calendar system.

(2) Design scheme and working principle

The logic block diagram of digital electronic clock is shown in figure 1. It consists of a quartz crystal oscillator, a frequency divider, a counter, a decoding display and a timing correction circuit. The oscillator generates a stable high-frequency pulse signal as the time reference of the digital clock, and then outputs a standard second pulse through the frequency divider. When the second counter reaches 60, it will be carried forward to the minute counter, and when the minute counter reaches 60, it will be carried forward to the hour counter and counted according to the rule of "24 revolutions 1". The output of the counter is sent to the display through the decoder respectively. When there is an error in timing, the timing circuit can be used to calibrate the time and minutes.

Figure 1 Logic Block Diagram of Digital Electronic Clock

Third, the unit circuit design, principle and device selection

(1) quartz crystal oscillator

1, explanation of important concepts

(1) feedback: part or all of the output of the amplifier circuit is sent back to the input end of the amplifier circuit in a certain way.

(2) Coupling: refers to the process of signal transmission from the first stage to the second stage.

2. The concrete working principle of quartz crystal oscillator.

Quartz crystal oscillator is characterized by accurate oscillation frequency, simple circuit structure and easy frequency adjustment. Widely used in color TV, computer, remote controller and other oscillation circuits. It also has piezoelectric effect: when an electric field is applied in a certain direction of the crystal, the crystal will be mechanically deformed; On the contrary, if mechanical pressure is applied to both sides of the wafer, an electric field will be generated in the corresponding direction of the wafer, which is a physical phenomenon called piezoelectric effect. Here we apply an electric field in a certain direction of the crystal, thus generating mechanical vibration in the direction perpendicular to this direction. With mechanical vibration, an electric field will be generated in the corresponding vertical plane, so that mechanical vibration and electric field are mutually causal. This cycle continues until the mechanical strength of the crystal reaches the limit and finally stabilizes. The frequency of this piezoelectric resonance is the natural frequency of the crystal oscillator.

An oscillator circuit consisting of an inverter and a timing crystal is shown in Figure 2. The self-feedback of two NOT gates G 1 and G2 is used to make it work in a linear state, and then the oscillation frequency is controlled by a synchronous crystal oscillator. At the same time, the capacitor C 1 is used as the coupling between the two NOT gates, and the resistors R 1 and R2 connected in parallel between the input and output of the two NOT gates are used as negative feedback elements. Because the feedback resistance is very small, it can be approximately considered that the output and input voltage drops of the NOT gate are equal. Capacitor C2 is used to prevent parasitic oscillation. For example, if the oscillation frequency of the clock crystal in the circuit is 4MHz, the output frequency of the circuit is 4MHz.

Fig. 2 Synchronous crystal oscillation circuit

(2) Frequency divider

1, 842 1 code system, 542 1 code system.

Sixteen combinations of four-bit binary codes are used as codes, and ten combinations represent ten digital symbols from 0 to 9. Usually four binary digits are used to represent a decimal digit, which is called binary-decimal coding, also called BCD code, as shown in table 1.

Table 1

842 1 code5421code

0 0000 0000

1 000 1 000 1

2 00 10 00 10

3 00 1 1 00 1 1

4 0 100 0 100

5 0 10 1 1000

6 0 1 10 100 1

7 0 1 1 1 10 10

8 1000 10 1 1

9 100 1 1 100

2. The specific working principle of the frequency divider.

Because the frequency generated by quartz crystal oscillator is very high, it is necessary to use frequency division circuit to obtain second pulse. For example, an oscillator outputs a 4MHz signal, which is divided into 1MHz by D flip-flop (74LS74) and then sent to 10 frequency divider (74LS90, which can be divided by 842 1 code or 542 1 code) for six times. (See Figure 3)

Figure 3 Frequency Division Circuit

3, the meaning of the logo in the picture

CP- input pulse signal

C0 carry signal

Q output pulse signal

(3) Counter

The second pulse signal passes through six counters to obtain the timing of "second" bit, ten bits, "minute" bit and ten bits, and "hour" bit and ten bits respectively. The "seconds" and "minutes" counters are in hexadecimal, and the hours are in hexadecimal.

1, hexadecimal counter

(1) counters are classified by trigger mode.

A counter is a logical component that accumulates the number of clock pulses. Counter is not only used for counting clock pulses, but also for timing, frequency division, pulse generation and digital operation. Counter is one of the most widely used logic elements. According to the trigger mode, counters are divided into synchronous counters and asynchronous counters. For synchronous counters, when the clock pulse is input, the flip-flops flip at the same time, while the flip-flops in asynchronous counters do not flip.

(2) The working principle of hexadecimal counter.

Both the "second" counting circuit and the "minute" counting circuit are in hexadecimal, and they are composed of a first-level 10 decimal counter and a first-level hexadecimal counter. As shown in fig. 4, the "second" and "minute" counters are composed of two medium-sized integrated circuits 74LS90 connected in series.

Fig. 4 60-ary counting circuit

IC 1 is a decimal counter, QD 1 is a decimal carry signal, and the 74LS90 counter is a decimal asynchronous counter. Decimal counting is realized by feedback zeroing, and IC2 and NAND gate form hexadecimal counting. 74LS90 is the falling edge of CP signal, and the falling edges of Q A 1 and Q C2 phase 0 10 1 are used as the input signals of the minute (hour) counter, and the high level 1 is sent to the next counter through NAND gates and NAND gates (the output level is always low level 0). Q B2 and Q C2 count to 0 1 10, and the generated high level 1 is sent to zeroing R0( 1), R0(2), R0( 1) and R0(2) in 74LS90 respectively, so that the counter is zeroed, and then It can be seen that IC 1 and IC2 are connected in series to realize hexadecimal counting.

Where: 74ls90-Decimal counter divisible by 2/5.

74ls04-Not a door

74LS00—— Two-input NAND gate

2,24 decimal counter

The hour counting circuit is a 24-bit counting circuit composed of IC5 and IC6, as shown in Figure 5.

When the 10 th trigger signal comes from the counting input terminal CP5 of IC5, the IC5 counter is automatically cleared, and the carry terminal QD5 outputs a carry signal to the IC6 time counter. When the 24th hour (carry signal from the minute counter) pulse arrives, the state of IC5 counter is "0 100". They are sent to the clearing terminals R0( 1) and R0(2) of IC5 and IC6 counters respectively, and then cleared by NOR of R0( 1) and R0(2) in 7490 to complete 24-bit counting.

Fig. 5 24-ary counting circuit

(4) decoding and display circuit

1, display principle (digital tube)

Digital tube is the common name of digital display. Commonly used digital displays include semiconductor digital tubes, fluorescent digital tubes, glow digital tubes and liquid crystal displays.

In this design, the semiconductor digital tube is selected, which is a glyph composed of light-emitting diodes (LED for short) to display numbers, and seven strip-shaped light-emitting diodes are arranged in a seven-segment combined glyph to form the semiconductor digital tube. There are two kinds of semiconductor digital tubes: anode and cathode. * * * anode The anodes of the seven LEDs of the digital tube are connected together, while the seven cathodes are independent. * * * cathode digital tube is opposite to * * * anode digital tube. The cathodes of the seven LEDs are connected together, but the anodes are independent.

When a cathode of the anode nixie tube is connected to a low level, the corresponding diode emits light, which can make a certain diode emit light according to the font, so the anode nixie tube needs to output a low-level effective decoder to drive it. * * * The cathode digital tube needs to output a high-level effective decoder to drive it.

2. Decoder principle (74LS47)

Decoding is the reverse process of coding. It "translates" the meaning given to the code when encoding. The logic circuit that realizes decoding becomes a decoder. The decoder output has a unique correspondence with the input code. 74LS47 is a seven-segment font decoder with low-level output, which is used together with the digital tube. Table 2 lists the truth table of 74LS47 and shows its relationship with the digital tube.

Table 2

Input and output display digital symbols

LT(——)RBI(——-)A3 A2 a 1 A0 BI(——)/RBO(——)

a(—) b(—) c(—) d(—) e(—) f(—) g(—)

1 1 0 0 0 0 1 0 0 0 0 0 0 1 0

1 X 0 0 1 1 1 0 1 1 1 1 1 1 1

1 X 0 0 1 0 1 0 0 1 0 0 1 0 0 1 0 2

1 X 0 0 1 1 1 0 0 0 1 1 0 3

1 X 0 1 0 0 1 0 0 1 0 0 1 1 0 0 4

1 X 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 5

1 X 0 1 1 0 1 1 1 0 0 0 0 6

1 X 0 1 1 1 1 0 0 1 1 1 1 1 1 7

1 X 1 0 0 0 1 0 0 0 0 0 0 0 8

1 X 1 0 0 1 0 0 0 1 0 0 1 1 0 0 9

X x x x 011111out.

10000011111/out.

0 X X X X X 1 0 0 0 0 0 0 8

(1)LT(——): Set the test light input and check whether each section of the digital tube can emit light normally. When lt (-) = 0, the decoder output is low regardless of the states of inputs A3, A2, A 1 and A0, and 8 is displayed if the driven digital tube is normal.

(2) Bi (-): Lights-out input, which is used to control lights-out of multi-digit display. When bi (-) = 0. No matter what state LT(——) and inputs A3, A2, A 1, A0 are, the decoder output is high, and the anode nixie tube is turned off.

(3) RBI (-): Zero input, set to eliminate unnecessary zeros. When each bit A3= A2 =A 1 =A0=0, it should display 0, but under the action of RBI (-) = 0, all the decoder outputs are high. The result is the same as the result of adding and extinguishing the light signal, and 0 will go out.

(4) RBO (-): Zero output, which is connected with Bi (——) * * as light input, and can realize zero control of multi-digit display when used together.

3. The cooperation of decoder and display.

Decoding is to translate the given code. This design is to translate the four-bit binary code output by the hour, minute and second counter into the corresponding decimal number and display it on the display. Usually, a display and a decoder are used together. The seven-segment decoder driver (74LS47) and the digital tube (LED) we choose are * * * anode connections (decoder drivers requiring low-level output). The decoding display circuit is shown in fig. 6.

Fig. 6 decoding display circuit

(5) Timing circuit

1, RS trigger (see figure 7)

Fig. 7 basic RS flip-flop

R(—) S(—)

Q Q(—)

make it clear

0 1

1 0

1 1

0 0 0

1

0 or 1

1 1

1 or 0

1 is set to 0.

Set 1

res sic stantibus

Abnormal state, after the 0 signal disappears, the flip-flop state is uncertain.

2, the switch circuit without tremor

Principle of jitter-free switch circuit: (see Figure 8) When the switch K is turned to 1, S(—)=0, R(—)= 1, and the trigger is set to 1. When the S (-) terminal is intermittently grounded several times due to the vibration of the switch K, it has no influence. When the trigger is set to 1, the state of 1 remains unchanged. Because the K tremor only makes the S (-) terminal leave the ground, but not the R (-) terminal, the flip-flop is reliably set to 1.

When the switch K is pulled from the S (-) terminal to the R (-) terminal, it has the same effect, and the trigger is reliably set to 0. The action of the switch is reflected from the Q terminal or Q (-) terminal, and the output level is stable.

3. The realization principle of time calibration circuit.

When the electronic clock is powered on or timing errors are found, it needs to be corrected. The time calibration circuit realizes the calibration of time and minutes respectively. Because all four mechanical switches have jitter, RS flip-flop is used as the de-jitter circuit. Using RS basic trigger and single-pole double-throw switch, the knife is normally closed at 2 o'clock and generates a counting pulse every time it moves, thus realizing the function of time adjustment. The circuit is shown in Figure 8.

Fig. 8 timing circuit

(6) Debugging

Wait till tomorrow. Electronic technology experiment and course design. Beijing: Machinery industry.

Press,1995.131~132

This book is complete.