Current location - Education and Training Encyclopedia - Graduation thesis - The last chapter of electronic information engineering graduation thesis is a bit difficult to write. Please help.
The last chapter of electronic information engineering graduation thesis is a bit difficult to write. Please help.
You can refer to the design and implementation of DSP system.

"This book:

Chapter 1 Overview of DSP

1. 1 modern digital signal processing

1. 1. 1 Introduction

1. 1.2 development stage of digital signal processing

The application of 1. 1.3 DSP

1.2 DSP chip

The basic structure of 1.2. 1 DSP chip

Development of 1.2.2 DSP chip

1.2.3 classification of DSP chips

1.2.4 DSP chip selection

1.2.5 TMS 320544X series

1. 2. 6 Other typical fixed-point DSP chips

Design and implementation of 1.3 DSP system

Composition and characteristics of 1.3. 1 DSP system

1.3.2 overall design of DSP system

Software design of 1.3.3 DSP system

Hardware design of 1.3.4 DSP system

1.3.5 system integration

The second chapter is the structure principle of TMS320C54X.

2. 1 bus structure

2.2 central processing unit

2.2. 1 arithmetic logic operation unit

Safety injection boxes a and b

2.2.3 barrel shifter

2.2.4 Multiplier/Adder Unit

2.5.5 Comparison, Selection and Storage Unit

Exponential encoder

2.2.7 CPU status and control registers

2.3 memory

2.3. 1 memory space

program storage

Data storage

Input/output memory

2.4 program memory address generation method

2.4. 1 program counter

2.4.2 Branch transfer

2.4.3 Call back.

Conditional operation

repetitive operation

Reset operation

suspend

2.4.8 power saving mode

2.5 On-chip peripheral circuits

2.5. 1 General Input/Output Pin

timer

clock generator

Host interface

2.6 serial port

2.6. 1 Serial Overview

2.6.2 Serial port composition block diagram

2.6.3 serial port control register

2.7 external bus

2.7. 1 external bus interface

2.7.2 Priority of external bus operation

Waiting state generator

Partition conversion logic

2.7.5 timing diagram of external bus interface

2.7.6 reset and IDLE3 power-saving working mode

Maintenance mode

Chapter 3 TMS320C54X Instruction System

3. 1 data addressing mode

3. 1. 1 immediate addressing

3. 1.2 absolute addressing

3. 1.3 accumulator addressing

3. 1.4 direct addressing

3. 1.5 indirect addressing

3. 1.6 memory image register addressing

3. 1.7 stack addressing

3.2 assembly line

3.2. 1 pipeline operation

3.2.2 Deferred branch transfer

Conditional execution

3.2.4 Dual addressable memory and pipeline

3.2.5 Single addressable memory and pipeline

3.3.6 Waiting time of assembly line

3.3 instruction system

3.3. 1 instruction notation

Arithmetic instruction

control command

Data transmission description

Logical operation instruction

3.3.6 Description of parallel operation

Chapter 4 Introduction of Public * * * Target File Format

4. Basic unit of1coff file-paragraph

4.2 Handling of Segments by Assemblers

4.3 Linker's Handling of Fragments

4.4 repositioning

4.5 symbols in coff files

Chapter 5 Assembly Language Development Tools

5. 1 assembler

5. 1. 1 Introduction and Call of Assembler

5. 1.2 internal function of assembler

5. 1.3 assembly pseudo-instruction

5.2 linker

5.2. 1 Run the connection program.

Options for linker

Linker command file

5.3c compiler

5.3. Overview of1tms320c54cc compiler

5.3.2 Use of TMS320C54XC Compiler

Chapter VI TMS320C54X Assembly Language Programming

6. 1 assembly language source program format

6.2 Constants and strings in assembly language

6.3 symbols in the assembly source program

6.4 Assemble the expressions in the source program

6.5 Source manifest file

6.6 Cross-reference manifest file

Chapter 7 TMS320C54XC Language Programming

7. 1tms320c54xc language

7. 1. 1 TMS 320c54xc Language Features

7. 1.2 TMS 320 C 54 XC data type

7. 1.3 keyword

7. 1.4 register variables and global register variables

7. 1.5 pragma

7. 1.6 Generate link name

7. 1.7 Initialize static and global variables

7.2 c code optimization

7.2. 1 Use the optimizer

7.2.2 Perform file-level optimization (-3 option)

7.2.3 Perform program-level optimization (-pm and -03 options)

7.2.4 Control program level optimization (-op option)

7.2.5 Access alias variables in optimized code

7.2.6 Insert extension directly and automatically (-0 1 option)

7.2.7 Use interleaving tools when running the optimization program.

7.2.8 Debugging of optimized code

7.2.9 Type of optimization to be performed

7.3 link c code

7.3. 1 Call Linker

7.3.2 Control the linking process

7.4 Runtime Environment

7.4. 1 memory mode

string lteral

7.4.3 Function Structure and Calling Convention

7.5 mixed programming of assembly language and C.

7,5.1Call the assembly language module with C code.

7.5.2 Accessing Assembly Language Variables in C Program

7.5.3 Use directly inserted assembly language.

7.5.4 Using internal functions to access assembly language statements

7.5.5 C and Optimization of Assembly Mixed Code

7.5.6 Use delete statement in optimized C code.

Interrupt handling

Chapter 8 Hardware Design of TMS320CC54X

8. Power supply design of1TMS 320c54x chip.

8.2 Design of 3.3V and 5V Mixed Logic System

8.3 External memory interface

Design of 8.4 TMS 320 c54x Hardware Platform

8.4. 1 TMS320C54EVM hardware platform structure

8.4.2 Requirements of TMS 320 C 54 EVM for Host Computer

TMS320C54EVM operation

Chapter 9 DSP application examples

9. Realization of communication between1PC and EVM platform

9.2 Development of DSP application system based on TMS 320 LC 549

9.2. 1 g.729a and system introduction

system composition

9.2.3 System Software and Hardware Design

9.2.4 System debugging

9.2.5 Formation of Independent System

9.3 DSP realizes packet error correction coding

9.3. 1 block coding basis

9.3.2 Cyclic code

9.3.3 Cyclic redundancy check code

9.3.4 Implementation of CRC coding algorithm on TMS320C54X DSP.