Fudan University distinguished professor Zhang Wu
Professor Tsinghua University's class
Adjunct Professor of Beijing University of Posts and Telecommunications 336 26038
Chairman/President of Lenovo Silicon Company, USA
Basic information:
1978- 1982, majoring in radio, Department of Physics, Fudan University, Shanghai.
1983- 1985, majoring in digital images, Department of Radio Electronics, Tsinghua University, Beijing.
1985- 1990, Ph.D., Department of Electrical and Computer Science, University of California, USA.
1990- 1992, senior engineer, American VSLI technology company.
1993- 1994, system engineer, Redwood design automation company, USA.
1995- 1996, chief designer of Alta Group Company, USA.
1997- 1999, American Cadence design system company, department director and chief designer.
1999- He is currently the president, chairman and technical director of Lenovo Silicon Industry Corporation.
Adjunct professor of Beijing University of Posts and Telecommunications since 2003.
Professor Tsinghua University from 2004 to present.
2004-present distinguished professor, Fudan University.
project
In 1988, the research achievement "cellular neural network" won the Gillette-Kaul Prize (IEEE Tran. CAS-35, oct 1988) obtained the American invention patent. In the 15 years since its invention, CNN has formed a very active research field.
1990- 1992, senior engineer of American VLSI Technology Inc, the earliest application specific integrated circuit (ASIC) company, was mainly responsible for the design of functional module library of large-scale integrated circuits during his tenure in the company, and obtained 8 American invention patents.
1993- 1999, American Sequoia Technology Company, system engineer. Redwood Technology Inc is a pioneer of SOC (Integrated on Chip) design software, and later merged with Comdisco Inc to form Alta Group Inc. As a system designer in Alta Group Inc., responsible for HDS part of SPW system software. Alta Group Inc. 1997 was merged into the parent company cadence design systems Inc., and served as the director and chief designer of wireless design service department in cadence design systems Inc., responsible for chip design for other companies. The main projects completed are: Iridium system mobile phone chip, ATSC digital TV receiving chip, ISDB-T digital TV analog system, DVB-T digital TV receiving chip demodulation part, ADSL chip error correction decoding part and GSM chip demodulation part. Obtained 5 American invention patents.
Since 2000, LegendSilicon Corp has been the president, chairman and technical director of the United States, responsible for developing DMB-T digital TV chips and systems, participating in the research and development of DMB-T digital TV transmission standards in the R&D Center of Digital TV Transmission Technology in Tsinghua University, and participating in the design of Zhongshi No.1 chip in the ASIC State Key Laboratory of Tsinghua and Fudan University. Nine China invention patents have been obtained.
Since 2003, he has been the chief scientist of Digital Multimedia Research Center of School of Information, Fudan University.
Recent research direction and objectives
(1) Academic research of new generation wireless multimedia communication technology and technical development of related algorithms, circuits and systems.
(2) The latest development of integrated broadband communication channel, frame theory, digital signal processing algorithm, circuit structure design and integrated circuit implementation technology.
(3) In the research of wireless broadband time-varying channel model, a channel model theory suitable for future multimedia communication is proposed.
(4) Research the application of frame theory in modern communication.
(5) Further study the modulation theory and demodulation algorithm of TDS-OFDM to improve the transmission performance.
(6) Research the realization of large-scale multimedia communication chip design and design practical products.
(7) Teaching frontier courses of science and technology, guiding graduate students to open topics and write academic papers.
Ren Yan Jun, professor of microelectronics and solid-state electronics at Fudan University, is a doctoral supervisor.
Resume:
1979- 1983: Graduated from Physics Department of Fudan University, majoring in semiconductor physics and semiconductor device physics, with a bachelor of science degree.
1983- 1986: graduated from the Department of Electronic Engineering of Fudan University with a master's degree in semiconductor physics and semiconductor device physics.
1986-200 1 year: teacher, Department of Electronic Engineering, Fudan University. Engaged in the teaching and research of integrated circuit design.
200 1-: Teacher of Microelectronics Department of Fudan University. Engaged in the teaching and research of integrated circuit design.
1994-: The State Key Laboratory of ASIC and System of Fudan University is engaged in research.
Academic, administrative and social organizations:
Professor of Microelectronics and Solid State Electronics (2000-).
Deputy Director, State Key Laboratory of ASIC and Systems, Fudan University (1998-).
Deputy Director, Department of Microelectronics, Fudan University (200 1-).
Chairman of ASIC International Annual Conference (Asicon1996/1998/20065438+0/2003) and member of project committee.
Chairman of the China-Portuguese Bilateral Seminar on Solid State Circuits (2000).
Member of American Institute of Electrical and Electronic Engineering (IEEE), Chairman of Education of Shanghai Branch of Solid State Circuits (2000-).
Science and technology expert of Shanghai Science and Technology Commission.
Reviewers of electronic journals, semiconductor journals and other professional journals.
Research interests:
1. High-frequency low-power low-voltage CMOS analog integrated circuit.
Low power consumption, high speed or high precision analog-to-digital converter (100 MHz, 8- 10 bit medium resolution)
Low jitter PLL (bandwidth adaptive or GHz high frequency) and low phase noise frequency synthesizer
Low voltage rail-to-rail CMOS operational amplifier, variable gain amplifier, high precision reference circuit, etc.
2. CMOS RF front-end circuit for mobile communication.
Low noise amplifier, mixer
Fractional n frequency synthesizer
S-D modulator, etc
3. Digital-analog mixed signal circuit in broadband data communication.
100 Mbps and Gigabit Ethernet physical layer of twisted pair (10100/1000base-t)
Optical Gigabit Ethernet physical layer (1.25ghz-3.125ghz serdes)
4. VLSI design of a new generation wireless multimedia digital communication chip.
Design of HDTV Channel Chip
OFDM modulation and demodulation method
Design of RF front-end analog circuit
5. Physical problems related to integrated circuit design.
Synchronous switching noise (SSN) in CMOS system
Electrostatic breakdown leakage in CMOS system
Main projects hosted and undertaken
1. 1990-2000 completed 13 project. These include:
Eight national key scientific and technological projects in the eighth five-year plan and the ninth five-year plan, such as "special circuit for multi-channel electronic stimulation receiver in cochlear implant" Pass the acceptance or appraisal.
Four major scientific and technological projects in Shanghai, such as "special storage circuit technology based on 8-bit CPU", "SSN effect in CMOS system and related circuit design research" and "automatic design technology based on cell library and IP macro core and its popularization and application". Pass the acceptance or appraisal.
The 1 project "Design of CMOS operational amplifier with low power consumption, low voltage and large dynamic range" funded by the backbone teachers of the Ministry of Education has been concluded.
2. The item 1 1 was completed in 2000-2003. These include:
1 "Development of Gigabit Ethernet IP Core" is a major project of Very Large Scale Integrated Circuit Design (SoC) of the 863 Program of the Ministry of Science and Technology. Pass the acceptance.
Six major projects of Shanghai Science and Technology Commission: research on design methods of CMOS RF IC for GSM, CMOS RF front-end and related IP cores, Wuxi Shang Hua 0.6 micron CMOS cell library, high-speed Ethernet physical layer and related IP cores, 125 MHz 8-bit high-speed ADC, digital equalization and data recovery algorithm for Gigabit Ethernet, etc. have passed the acceptance or appraisal.
Four industrial cooperation projects: GHz CMOS SERDES, high-speed Ethernet PHY realized by analog technology, research on technical scheme of special DSP for GSM mobile phone, research on new methods of chaotic modulation and demodulation in communication system, etc.
Since 2003, four projects have been under study. These include:
The 863 Program of the Ministry of Science and Technology of the People's Republic of China is a major project of Very Large Scale Integrated Circuit Design (SoC) "Development of High Performance Ethernet Switch and Network Interface Card Core Chip". (2003-2005)
"GSM/GPRS/WCDMA RF transceiver" is a major project of linkage between the whole machine and integrated circuit of Shanghai Information Commission. (2004-2006)
Shanghai Science and Technology Commission AM Fund Project "Low Phase Noise CMOS Fractional N crossover frequency Synthesizer" (2003-2004).
Industrial cooperation project "Multi-port Low Power Consumption 100 Mbps Ethernet Physical Layer" (2004-2005)
Related research results:
1. 1.998 National Science and Technology Progress Second Prize "1-0.35 micron CMOS Basic Cell Library" reached the international advanced level in the mid-1990s.
2.200 1 Shanghai Science and Technology Progress Third Prize "Automatic Design Method Based on Cell Library and IP Macro Core and Its Popularization and Application", passed the appraisal in 2000, and was at the leading level in China.
3. "100 MHz CMOS high-speed analog-to-digital converter" passed the appraisal in 2004 and reached the international advanced level in 2003.
4. 1 1 Acceptance of patent application for invention of communication integrated circuit. Including high-speed analog-to-digital conversion, Ethernet physical layer analog reception/digital equalization, data and clock recovery/high-speed data alignment, high-speed cable transmission model, chaotic modulation and demodulation methods, etc.
5. Published about 50 papers. These include:
He has published more than 30 articles in domestic authoritative core journals such as Journal of Electronics, Journal of Semiconductors and Journal of Communication.
He has published more than 20 papers in international conferences, such as IEEE annual conference on circuits and systems (USA), IEEE seminar on nonlinear electronic systems (Switzerland), IEEE annual conference on communication circuits and systems (Russia), Asia-Pacific annual conference on design automation (Japan) and ASIC annual conference (China).
Related teaching and postgraduate training:
1995-: 27 masters and doctors. Among them, 12 is studying and 15 is about to graduate.
1995-: Professional basic courses for undergraduates and postgraduates. It mainly includes: the design principle of digital integrated circuit, the design method of low power VLSI circuit, etc.
Comprehensive reward:
From 65438 to 0999-2000, he was awarded the title of "Outstanding Young Teachers in Shanghai Universities".
In 2004, he was awarded the title of "Excellent Graduate Tutor of Fudan University".
Contact information:
State Key Laboratory of ASIC and System in Zhangjiang Campus of Fudan University
No.825, Zhangheng Road, Pudong New Area, Shanghai 20 1203.
Tel: +86-2 1-5 1355223
E-mail :jyren@fudan.edu.cn